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authorkrebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4>2016-04-29 09:17:35 +0000
committerkrebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4>2016-04-29 09:17:35 +0000
commit4ae803e1df59d3525a4b8c9d5da11e0bf1876869 (patch)
tree862051704ad7057867536ddf07eccd300a1ce886 /gcc/config/s390/2964.md
parent7396c35dfe4ed3d9c3565573e41fd213f7ba1baf (diff)
S/390: Replace LDER with LDR.
For performance reasons it is important to write the full 64 bits of an FPR target reg even when dealing with 32 bit values. So we chose lder over ler for 32 bit float register moves. lder zero-extends the 32 bit value from the source reg to 64 bit in the target. However, since it actually doesn't matter whether we write the upper 32 bits with zeros or with any other garbage we can also use ldr instead. It is bit shorter and therefore will do good for I-Cache usage. gcc/ChangeLog: 2016-04-29 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/2964.md ("z13_unit_fxu", "z13_0"): Remove lder. * config/s390/s390.md ("movsi_larl", "*movsi_esa", "mov<mode>"): Change lder to ldr. * config/s390/vector.md ("mov<mode>"): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@235627 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/s390/2964.md')
-rw-r--r--gcc/config/s390/2964.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/s390/2964.md b/gcc/config/s390/2964.md
index d2211e1b96d..e0e732b7f6d 100644
--- a/gcc/config/s390/2964.md
+++ b/gcc/config/s390/2964.md
@@ -57,7 +57,7 @@ vllezh,oc,xc,clc,lrl,ear,nc,lgrl,sfpc,llgf,llgfrl,llgh,llgt,lcbb,vll,sar") (cons
(define_attr "z13_unit_fxu" ""
(cond [(eq_attr "mnemonic" "s,lcgr,x,nop,oiy,ppa,ng,msy,sgrk,vstl,aghik,\
msgf,ipm,mvi,stocg,rll,srlg,cghsi,clgit,srlk,alrk,sg,sh,sl,st,sy,vst,ark,\
-xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,laa,lder,sgf,lan,llilf,\
+xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,laa,sgf,lan,llilf,\
llilh,ag,llill,lay,al,n,laxg,ar,ahi,sgr,ntstg,ay,stcy,nopr,mfy,ngrk,lbr,\
br,dsgr,stdy,ork,ldgr,lcr,cg,ch,lgfrl,cl,stoc,cr,agfr,stgrl,cy,alfi,xg,\
cgfi,xi,clfhsi,cgfr,xr,slb,mghi,clfi,slg,clhhsi,agfi,clfit,sly,mr,ldr,nihf,\
@@ -121,7 +121,7 @@ vchfs,madb,ddbr") (const_int 1)]
(and (eq_attr "cpu" "z13")
(eq_attr "mnemonic" "s,lcgr,x,nop,oiy,vlbb,ppa,ng,sgrk,vstl,aghik,\
mvc,ipm,llgc,mvi,stocg,rll,jg,srlg,cghsi,clgit,srlk,alrk,sg,sh,sl,st,sy,\
-vst,ark,xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,llc,laa,lder,sgf,\
+vst,ark,xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,llc,laa,sgf,\
lan,llhrl,llilf,llilh,ag,llill,lay,al,n,laxg,ar,ahi,sgr,ntstg,ay,stcy,vl,\
nopr,ngrk,lbr,br,stdy,ork,ldgr,lcr,cg,ch,llghrl,lgfrl,cl,stoc,cr,agfr,stgrl,\
cy,alfi,xg,cgfi,xi,vlrepf,vlrepg,vlreph,clfhsi,cgfr,xr,slb,mghi,clfi,slg,\