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authorYvan Roux <yvan.roux@linaro.org>2015-11-16 11:10:20 +0100
committerYvan Roux <yvan.roux@linaro.org>2015-11-16 11:10:43 +0100
commit857eae148d8db722746e1ed5b562ab807a34344f (patch)
tree352d0e2a224f5aad4d7525798ad3d130dc0bf18a /gcc/config/rs6000
parentb1e6d6986415989dbbdcd3ab8339f437fcc83ec6 (diff)
gcc/
Backport from trunk r222767. 2015-05-04 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.h (TARGET_SUPPORTS_WIDE_INT): New define. * config/i386/i386.c (ix86_legitimate_constant_p): Handle TImode as CONST_WIDE_INT, not CONST_DOUBLE. (ix86_cannot_force_const_mem): Handle CONST_WIDE_INT. (output_pic_addr_const): Do not handle VOIDmode CONST_DOUBLEs. (ix86_find_base_term): Do not check for CONST_DOUBLE. (ix86_print_operand): Do not handle non-FPmode CONST_DOUBLEs. (ix86_build_signbit_mask): Rewrite using wide ints. (ix86_split_to_parts) [HOST_BITS_PER_WIDE_INT < 64]: Remove. (ix86_rtx_costs): Handle CONST_WIDE_INT. (find_constant): Ditto. * config/i386/i386.md (bts, btr, btc peepholes): Rewrite using gen_int_mode. * config/i386/predicates.md (x86_64_immediate_operand) <case CONST_INT>: Remove HOST_BITS_PER_WIDE_INT == 32 code. (x86_64_zext_immediate_operand): Remove CONST_DOUBLE handling. <case CONST_INT>: Remove HOST_BITS_PER_WIDE_INT == 32 code. (const0_operand): Also match const_wide_int. (constm1_operand): Ditto. (const1_operand): Ditto. gcc/ Backport from trunk r226328. 2015-07-28 David Sherwood <david.sherwood@arm.com> * config/arm/arm.c (neon_element_bits, neon_valid_immediate): Call GET_MODE_INNER unconditionally. * config/spu/spu.c (arith_immediate_p): Likewise. * config/i386/i386.c (ix86_build_signbit_mask): Likewise. * expmed.c (synth_mult): Remove check for VOIDmode result from GET_MODE_INNER. (expand_mult_const): Likewise. * fold-const.c (fold_binary_loc): Replace call to element_precision with call to GET_MODE_PRECISION. * genmodes.c (emit_mode_inner_inline): Replace void_mode->name with m->name. (emit_mode_inner): Likewise. * lto-streamer-out.c (lto_write_mode_table): Update GET_MODE_INNER result check. * machmode.h (GET_MODE_UNIT_SIZE): Simplify. (GET_MODE_UNIT_PRECISION): Likewise. * rtlanal.c (subreg_get_info): Call GET_MODE_INNER unconditionally. * simplify-rtx.c (simplify_immed_subreg): Likewise. * stor-layout.c (bitwise_type_for_mode): Update assert. (element_precision): Remove. gcc/ Backport from trunk r226403. 2015-07-30 David Sherwood <david.sherwood@arm.com> * config/aarch64/aarch64-simd.md (aarch64_ext<mode>): Replace call to GET_MODE_SIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_SIZE (m). * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Likewise. * config/arm/arm.c (neon_valid_immediate): Likewise. * config/i386/i386.c (classify_argument, ix86_expand_int_vcond) (expand_vec_perm_blend, expand_vec_perm_pshufb): Likewise. (expand_vec_perm_pshufb2, expand_vec_perm_vpshufb2_vpermq): Likewise. (expand_vec_perm_vpshufb2_vpermq): Likewise. (expand_vec_perm_vpshufb2_vpermq_even_odd): Likewise. (expand_vec_perm_vpshufb4_vpermq2): Likewise. * config/i386/sse.md (<extract_type>_vinsert<shuffletype><extract_suf>_mask): Likewise. (*ssse3_palignr<mode>_perm): Likewise. * config/rs6000/rs6000.c (rs6000_complex_function_value): Likewise. * config/spu/spu.c (arith_immediate_p): Likewise. * simplify-rtx.c (simplify_const_unary_operation): Likewise. (simplify_binary_operation_1, simplify_ternary_operation): Likewise. gcc/ Backport from trunk r226936. 2015-08-17 David Sherwood <david.sherwood@arm.com> * config/arm/arm.c (neon_element_bits): Replace call to GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m). * config/arm/neon.md (neon_vget_lane<mode>): Likewise. (neon_vget_laneu<mode>, neon_vset_lane<mode>): Likewise (neon_vdup_lane<mode>): Likewise. * config/i386/i386.c (ix86_expand_int_vcond): Likewise. (ix86_expand_multi_arg_builtin, ix86_expand_reduc): Likewise. (expand_vec_perm_palignr, ix86_expand_sse2_abs): Likewise. * config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise. * config/spu/spu.c (arith_immediate_p): Likewise. * expmed.c (store_bit_field_1, extract_bit_field_1): Likewise. * expr.c (expand_expr_real_2): Likewise. * optabs.c (shift_amt_for_vec_perm_mask): Likewise. * simplify-rtx.c (simplify_immed_subreg): Likewise. * tree-cfg.c (verify_gimple_assign_ternary): Likewise. * tree-vect-patterns.c (vect_recog_mixed_size_cond_pattern): Likewise. New variable. * fold-const.c (fold_binary_loc): Replace call to GET_MODE_PRECISION (GET_MODE_INNER (m)) with GET_MODE_UNIT_PRECISION (m). gcc/ Backport from trunk r227013. 2015-08-19 David Sherwood <david.sherwood@arm.com> * genmodes.c (emit_mode_unit_size_inline): New function. (emit_mode_unit_precision_inline): New function. (emit_insn_modes_h): Emit new #define. Emit new functions. (emit_mode_unit_size): New function. (emit_mode_unit_precision): New function. (emit_mode_adjustments): Add mode_unit_size adjustments. (emit_insn_modes_c): Emit new arrays. * machmode.h (GET_MODE_UNIT_SIZE, GET_MODE_UNIT_PRECISION): Update to use new inline methods. Change-Id: Ic5a8a96f8fc5e8adc144ca539430d7c4f463cf35
Diffstat (limited to 'gcc/config/rs6000')
-rw-r--r--gcc/config/rs6000/rs6000.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index bb7f45d25e7..d06e9a8d48e 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -31740,8 +31740,7 @@ rs6000_do_expand_vec_perm (rtx target, rtx op0, rtx op1,
imode = vmode;
if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT)
{
- imode = GET_MODE_INNER (vmode);
- imode = mode_for_size (GET_MODE_BITSIZE (imode), MODE_INT, 0);
+ imode = mode_for_size (GET_MODE_UNIT_BITSIZE (vmode), MODE_INT, 0);
imode = mode_for_vector (imode, nelt);
}
@@ -31810,7 +31809,7 @@ rs6000_complex_function_value (machine_mode mode)
unsigned int regno;
rtx r1, r2;
machine_mode inner = GET_MODE_INNER (mode);
- unsigned int inner_bytes = GET_MODE_SIZE (inner);
+ unsigned int inner_bytes = GET_MODE_UNIT_SIZE (mode);
if (FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
regno = FP_ARG_RETURN;