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| author | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-07-13 04:46:34 +0000 |
|---|---|---|
| committer | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-07-13 04:46:34 +0000 |
| commit | 47ae02b70c395550e01975e649e37f6ea829dac5 (patch) | |
| tree | b334918063791e89f97a111eb02e3d0c9f8a766e /gcc/config/arm/arm1020e.md | |
| parent | d7d884cefe202081bff234e3bd0a3dcaed79d5a1 (diff) | |
Fix double word typos.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@225726 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/arm1020e.md')
| -rw-r--r-- | gcc/config/arm/arm1020e.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/arm/arm1020e.md b/gcc/config/arm/arm1020e.md index b296c8bf291..3c1bfb08795 100644 --- a/gcc/config/arm/arm1020e.md +++ b/gcc/config/arm/arm1020e.md @@ -58,7 +58,7 @@ ;; ALU instructions require three cycles to execute, and use the ALU ;; pipeline in each of the three stages. The results are available -;; after the execute stage stage has finished. +;; after the execute stage has finished. ;; ;; If the destination register is the PC, the pipelines are stalled ;; for several cycles. That case is not modeled here. |