diff options
author | Michael Collison <michael.collison@linaro.org> | 2015-07-30 13:20:15 -0700 |
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committer | Michael Collison <michael.collison@linaro.org> | 2015-07-30 13:20:15 -0700 |
commit | 033b6c42b9e235ddfebe7996d2a0489abc7272aa (patch) | |
tree | 02c357cfa453c24c35eba53696e408742f51b847 | |
parent | ff285c7482652e60d852540da8f9be880da77351 (diff) |
aarch32 changes for tcwg-833linaro-local/tcwg-aarch32-833-v3
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/arm/neon.md | 40 |
2 files changed, 45 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8d22ffc7aed..863537ae5c6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-07-22 Michael Collison <michael.collison@linaro.org> + + * config/arm/neon.md (widen_<us>sum<mode>): New patterns + where mode is VQI to improve mixed mode vectorization. + 2015-07-22 Uros Bizjak <ubizjak@gmail.com> PR target/66954 diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 654d9d5c1aa..eb9f6692225 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -1174,6 +1174,26 @@ ;; Widening operations +(define_insn_and_split "widen_ssum<mode>3" + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=&w") + (plus:<V_double_width> (sign_extend:<V_double_width> + (match_operand:VQI 1 "s_register_operand" "w")) + (match_operand:<V_double_width> 2 "s_register_operand" "0")))] + "TARGET_NEON" + "#" + "&& reload_completed" + [(const_int 0)] +{ + rtx loreg = simplify_gen_subreg (<V_HALF>mode, operands[1], <MODE>mode, 0); + rtx hireg = simplify_gen_subreg (<V_HALF>mode, operands[1], <MODE>mode, GET_MODE_SIZE (<V_HALF>mode)); + + emit_insn (gen_widen_ssum<V_half>3 (operands[0], loreg, operands[2])); + emit_insn (gen_widen_ssum<V_half>3 (operands[0], hireg, operands[2])); + DONE; + } + [(set_attr "type" "neon_add_widen") + (set_attr "length" "8")]) + (define_insn "widen_ssum<mode>3" [(set (match_operand:<V_widen> 0 "s_register_operand" "=w") (plus:<V_widen> (sign_extend:<V_widen> @@ -1184,6 +1204,26 @@ [(set_attr "type" "neon_add_widen")] ) +(define_insn_and_split "widen_usum<mode>3" + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=&w") + (plus:<V_double_width> (zero_extend:<V_double_width> + (match_operand:VQI 1 "s_register_operand" "w")) + (match_operand:<V_double_width> 2 "s_register_operand" "0")))] + "TARGET_NEON" + "#" + "&& reload_completed" + [(const_int 0)] +{ + rtx loreg = simplify_gen_subreg (<V_HALF>mode, operands[1], <MODE>mode, 0); + rtx hireg = simplify_gen_subreg (<V_HALF>mode, operands[1], <MODE>mode, GET_MODE_SIZE (<V_HALF>mode)); + + emit_insn (gen_widen_usum<V_half>3 (operands[0], loreg, operands[2])); + emit_insn (gen_widen_usum<V_half>3 (operands[0], hireg, operands[2])); + DONE; + } + [(set_attr "type" "neon_add_widen") + (set_attr "length" "8")]) + (define_insn "widen_usum<mode>3" [(set (match_operand:<V_widen> 0 "s_register_operand" "=w") (plus:<V_widen> (zero_extend:<V_widen> |