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authorrenlin <renlin@138bc75d-0d04-0410-961f-82ee72b054a4>2015-06-24 13:36:53 +0000
committerrenlin <renlin@138bc75d-0d04-0410-961f-82ee72b054a4>2015-06-24 13:36:53 +0000
commit87eb018353c4ea3db4992cf3c325e08a70a2d7df (patch)
tree748586f49cea5707b95e41db24e681df197893a3
parent207695d55ce9c75bc5ea1582a087f508039656b8 (diff)
[PATCH][AARCH64]Add ACLE predefined marcos: __ARM_ALIGN_MAX_PWR and
__ARM_ALIGN_MAX_STACK_PWR gcc/ 2015-06-24 Renlin Li <renlin.li@arm.com> * config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Add __ARM_ALIGN_MAX_PWR, __ARM_ALIGN_MAX_STACK_PWR. gcc/testsuite/ 2015-06-24 Renlin Li <renlin.li@arm.com> * gcc.target/aarch64/arm_align_max_pwr.c: New. * gcc.target/aarch64/arm_align_max_stack_pwr.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@224898 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/aarch64/aarch64.h4
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c15
-rw-r--r--gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c15
5 files changed, 44 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b4694b14da0..6c4a2678878 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-24 Renlin Li <renlin.li@arm.com>
+
+ * config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Add
+ __ARM_ALIGN_MAX_PWR, __ARM_ALIGN_MAX_STACK_PWR.
+
2015-06-24 Richard Biener <rguenther@suse.de>
* genmatch.c (enum tree_code): Add VIEW_CONVERT[012].
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index a22c6e40b5e..8b2d2ca6ff7 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -29,6 +29,10 @@
builtin_define ("__aarch64__"); \
builtin_define ("__ARM_64BIT_STATE"); \
builtin_define_with_int_value \
+ ("__ARM_ALIGN_MAX_PWR", 28); \
+ builtin_define_with_int_value \
+ ("__ARM_ALIGN_MAX_STACK_PWR", 16); \
+ builtin_define_with_int_value \
("__ARM_ARCH", aarch64_architecture_version); \
cpp_define_formatted \
(parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version); \
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7040593fbed..4de42859817 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-24 Renlin Li <renlin.li@arm.com>
+
+ * gcc.target/aarch64/arm_align_max_pwr.c: New.
+ * gcc.target/aarch64/arm_align_max_stack_pwr.c: New.
+
2015-06-24 Patrick Palka <ppalka@gcc.gnu.org>
Revert:
diff --git a/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c b/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c
new file mode 100644
index 00000000000..bbb4c6f9d04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+
+#include <stdio.h>
+#include <assert.h>
+
+#define align (1ul << __ARM_ALIGN_MAX_PWR)
+static int x __attribute__ ((aligned (align)));
+
+int
+main ()
+{
+ assert ((((unsigned long)&x) & (align - 1)) == 0);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c b/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c
new file mode 100644
index 00000000000..7a6355b054e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+
+#include <stdio.h>
+#include <assert.h>
+
+#define align (1ul << __ARM_ALIGN_MAX_STACK_PWR)
+
+int
+main ()
+{
+ int x __attribute__ ((aligned (align)));
+
+ assert ((((unsigned long)&x) & (align - 1)) == 0);
+ return 0;
+}