diff options
| author | Yvan Roux <yvan.roux@linaro.org> | 2017-08-14 10:36:05 +0200 |
|---|---|---|
| committer | Yvan Roux <yvan.roux@linaro.org> | 2017-08-16 08:15:31 +0000 |
| commit | 126223663f5eb2b1dd7e39a3acd9d939a3ede9ea (patch) | |
| tree | 50b30b8f0f1fd9b5de896fa70af4f9b20e5691b8 | |
| parent | 4c10b121384916d88eb764caae101e9cc3dd416b (diff) | |
gcc/
Backport from trunk r249457.
2017-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse,
SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z.
(aarch64_compare_and_swap<mode>_lse, GPI): Likewise.
(aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2.
(aarch64_atomic_cas<mode>, GPI): Likewise.
Change-Id: Ifbe7f876c2a74f2ac7a7a16ec1ae793375cd8290
| -rw-r--r-- | gcc/config/aarch64/atomics.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md index 27fc1933ce3..32b7169ffab 100644 --- a/gcc/config/aarch64/atomics.md +++ b/gcc/config/aarch64/atomics.md @@ -94,7 +94,7 @@ (set (match_dup 1) (unspec_volatile:SHORT [(match_operand:SI 2 "aarch64_plus_operand" "rI") ;; expected - (match_operand:SHORT 3 "register_operand" "r") ;; desired + (match_operand:SHORT 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -119,7 +119,7 @@ (set (match_dup 1) (unspec_volatile:GPI [(match_operand:GPI 2 "aarch64_plus_operand" "rI") ;; expect - (match_operand:GPI 3 "register_operand" "r") ;; desired + (match_operand:GPI 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -616,7 +616,7 @@ (set (match_dup 1) (unspec_volatile:SHORT [(match_dup 0) - (match_operand:SHORT 2 "register_operand" "r") ;; value. + (match_operand:SHORT 2 "aarch64_reg_or_zero" "rZ") ;; value. (match_operand:SI 3 "const_int_operand" "")] ;; model. UNSPECV_ATOMIC_CAS))] "TARGET_LSE && reload_completed" @@ -640,7 +640,7 @@ (set (match_dup 1) (unspec_volatile:GPI [(match_dup 0) - (match_operand:GPI 2 "register_operand" "r") ;; value. + (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ") ;; value. (match_operand:SI 3 "const_int_operand" "")] ;; model. UNSPECV_ATOMIC_CAS))] "TARGET_LSE && reload_completed" |