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authorlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>1997-12-24 22:06:54 +0000
committerlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>1997-12-24 22:06:54 +0000
commita9eb7f8eecb0d9646141fe04d1e693f322017e91 (patch)
treee778e93d8f0b600b05cbf51ea5d4d4566f7df7da
parent14f8eee2c5d4d1de14169f054eaf155ebadefa67 (diff)
* mips.c (mips_expand_epilogue): Emit blockage insn before call to
save_restore_insns if no FP and GP will be restored. * abi64.h (LONG_MAX_SPEC): Check MIPS_ABI_DEFAULT and TARGET_DEFAULT, and define __LONG_MAX__ appropriately. Add support for -mabi=X, -mlong64, and -mgp{32,64} options. * mips.c (mips_abi): Change type to int. * mips.h (enum mips_abi_type): Delete. (ABI_32, ABI_N32, ABI_64, ABI_EABI): Define as constants. (mips_abi): Change type to int. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/egcs_1_00_branch@17228 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog13
-rw-r--r--gcc/config/mips/abi64.h18
-rw-r--r--gcc/config/mips/mips.c11
-rw-r--r--gcc/config/mips/mips.h15
4 files changed, 46 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f0977e3584a..666fe13a648 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+Wed Dec 24 23:03:42 1997 Jim Wilson (wilson@cygnus.com)
+
+ * mips.c (mips_expand_epilogue): Emit blockage insn before call to
+ save_restore_insns if no FP and GP will be restored.
+
+ * abi64.h (LONG_MAX_SPEC): Check MIPS_ABI_DEFAULT and TARGET_DEFAULT,
+ and define __LONG_MAX__ appropriately. Add support for -mabi=X,
+ -mlong64, and -mgp{32,64} options.
+ * mips.c (mips_abi): Change type to int.
+ * mips.h (enum mips_abi_type): Delete.
+ (ABI_32, ABI_N32, ABI_64, ABI_EABI): Define as constants.
+ (mips_abi): Change type to int.
+
Mon Dec 22 09:55:01 1997 Jeffrey A Law (law@cygnus.com)
* verison.c: Bump for beta release of egcs-1.0.1.
diff --git a/gcc/config/mips/abi64.h b/gcc/config/mips/abi64.h
index a3e768cdc2d..4f6fccfafb9 100644
--- a/gcc/config/mips/abi64.h
+++ b/gcc/config/mips/abi64.h
@@ -213,8 +213,24 @@ extern struct rtx_def *mips_function_value ();
(mips_abi == ABI_EABI && (NAMED) \
&& FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED))
+/* Define LONG_MAX correctly for all users. We need to handle 32 bit EABI,
+ 64 bit EABI, N32, and N64 as possible defaults. The checks performed here
+ are the same as the checks in override_options in mips.c that determines
+ whether MASK_LONG64 will be set.
+
+ This does not handle inappropriate options or ununusal option
+ combinations. */
+
#undef LONG_MAX_SPEC
-#define LONG_MAX_SPEC "%{!mno-long64:-D__LONG_MAX__=9223372036854775807LL}"
+#if ((MIPS_ABI_DEFAULT == ABI_64) || ((MIPS_ABI_DEFAULT == ABI_EABI) && ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_64BIT)))
+#define LONG_MAX_SPEC \
+ "%{!mabi=n32:%{!mno-long64:%{!mgp32:-D__LONG_MAX__=9223372036854775807L}}}"
+#else
+#define LONG_MAX_SPEC \
+ "%{mabi=64:-D__LONG_MAX__=9223372036854775807L} \
+ %{mlong64:-D__LONG_MAX__=9223372036854775807L} \
+ %{mgp64:-D__LONG_MAX__=9223372036854775807L}"
+#endif
/* ??? Unimplemented stuff follows. */
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 79fe3261b84..4ca834b72d1 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -193,9 +193,9 @@ enum processor_type mips_cpu;
int mips_isa;
#ifdef MIPS_ABI_DEFAULT
-/* which ABI to use. This is defined to a constant in mips.h if the target
+/* Which ABI to use. This is defined to a constant in mips.h if the target
doesn't support multiple ABIs. */
-enum mips_abi_type mips_abi;
+int mips_abi;
#endif
/* Strings to hold which cpu and instruction set architecture to use. */
@@ -5627,6 +5627,13 @@ mips_expand_epilogue ()
else
emit_insn (gen_movsi (stack_pointer_rtx, frame_pointer_rtx));
}
+ /* The GP/PIC register is implicitly used by all SYMBOL_REFs, so if we
+ are going to restore it, then we must emit a blockage insn to
+ prevent the scheduler from moving the restore out of the epilogue. */
+ else if (TARGET_ABICALLS && mips_abi != ABI_32
+ && (current_frame_info.mask
+ & (1L << (PIC_OFFSET_TABLE_REGNUM - GP_REG_FIRST))))
+ emit_insn (gen_blockage ());
save_restore_insns (FALSE, tmp_rtx, tsize, (FILE *)0);
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 1de2e25564d..e50bc8a171d 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -77,21 +77,20 @@ enum processor_type {
/* Recast the cpu class to be the cpu attribute. */
#define mips_cpu_attr ((enum attr_cpu)mips_cpu)
-/* Which ABI to use. This is only used by the Irix 6 port currently. */
+/* Which ABI to use. These are constants because abi64.h must check their
+ value at preprocessing time. */
-enum mips_abi_type {
- ABI_32,
- ABI_N32,
- ABI_64,
- ABI_EABI
-};
+#define ABI_32 0
+#define ABI_N32 1
+#define ABI_64 2
+#define ABI_EABI 3
#ifndef MIPS_ABI_DEFAULT
/* We define this away so that there is no extra runtime cost if the target
doesn't support multiple ABIs. */
#define mips_abi ABI_32
#else
-extern enum mips_abi_type mips_abi;
+extern int mips_abi;
#endif
/* Whether to emit abicalls code sequences or not. */