diff options
| author | Yvan Roux <yvan.roux@linaro.org> | 2017-07-04 15:51:57 +0200 |
|---|---|---|
| committer | Yvan Roux <yvan.roux@linaro.org> | 2017-07-05 07:08:21 +0000 |
| commit | 997d96a83dc7bd109432b35439f70e1e1d2de60f (patch) | |
| tree | f56bf3aaf646eb7b63df86109d887f0cacd84b33 | |
| parent | 9b92e16ccbabc59475d380ee85336955782659d0 (diff) | |
gcc/
Backport from trunk r248921.
2017-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/atomics.md (atomic_compare_and_swap<mode> expander):
Use aarch64_reg_or_zero predicate for operand 4.
(aarch64_compare_and_swap<mode> define_insn_and_split):
Use aarch64_reg_or_zero predicate for operand 3. Add 'Z' constraint.
(aarch64_store_exclusive<mode>): Likewise for operand 2.
gcc/testsuite/
Backport from trunk r248921.
2017-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c: New test.
Change-Id: Ic89ac52659f74e8583e5c2b82854fe31025d8d4c
| -rw-r--r-- | gcc/config/aarch64/atomics.md | 8 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c | 12 |
2 files changed, 16 insertions, 4 deletions
diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md index 09d441075f0..27fc1933ce3 100644 --- a/gcc/config/aarch64/atomics.md +++ b/gcc/config/aarch64/atomics.md @@ -25,7 +25,7 @@ (match_operand:ALLI 1 "register_operand" "") ;; val out (match_operand:ALLI 2 "aarch64_sync_memory_operand" "") ;; memory (match_operand:ALLI 3 "general_operand" "") ;; expected - (match_operand:ALLI 4 "register_operand" "") ;; desired + (match_operand:ALLI 4 "aarch64_reg_or_zero" "") ;; desired (match_operand:SI 5 "const_int_operand") ;; is_weak (match_operand:SI 6 "const_int_operand") ;; mod_s (match_operand:SI 7 "const_int_operand")] ;; mod_f @@ -45,7 +45,7 @@ (set (match_dup 1) (unspec_volatile:SHORT [(match_operand:SI 2 "aarch64_plus_operand" "rI") ;; expected - (match_operand:SHORT 3 "register_operand" "r") ;; desired + (match_operand:SHORT 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -69,7 +69,7 @@ (set (match_dup 1) (unspec_volatile:GPI [(match_operand:GPI 2 "aarch64_plus_operand" "rI") ;; expect - (match_operand:GPI 3 "register_operand" "r") ;; desired + (match_operand:GPI 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -534,7 +534,7 @@ (unspec_volatile:SI [(const_int 0)] UNSPECV_SX)) (set (match_operand:ALLI 1 "aarch64_sync_memory_operand" "=Q") (unspec_volatile:ALLI - [(match_operand:ALLI 2 "register_operand" "r") + [(match_operand:ALLI 2 "aarch64_reg_or_zero" "rZ") (match_operand:SI 3 "const_int_operand")] UNSPECV_SX))] "" diff --git a/gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c b/gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c new file mode 100644 index 00000000000..15606b68990 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +foo (int *a) +{ + int x = 3; + return __atomic_compare_exchange_n (a, &x, 0, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE); +} + +/* { dg-final { scan-assembler "stxr\\tw\[0-9\]+, wzr,.*" } } */ +/* { dg-final { scan-assembler-not "mov\\tw\[0-9\]+, 0" } } */ |