diff options
| author | Christophe Lyon <christophe.lyon@linaro.org> | 2016-06-08 14:31:26 +0200 |
|---|---|---|
| committer | Yvan Roux <yvan.roux@linaro.org> | 2016-06-14 13:21:56 +0000 |
| commit | cac0a66069b5268b59a69d7d730f9318ac896aa3 (patch) | |
| tree | 25948076c4e198187f638e9e198e804171f837dd | |
| parent | df5a7c0a40712c7efe8335e4de3e05e9a2a1a0a2 (diff) | |
gcc/
Backport from trunk r236913.
2016-05-31 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h (arm_arch_thumb1): Declare.
* config/arm/arm.c (arm_arch_thumb1): Define.
(arm_option_override): Initialize arm_arch_thumb1.
* config/arm/arm.h (arm_arch_thumb1): Declare.
(TARGET_ARM_ARCH_ISA_THUMB): Use arm_arch_thumb to determine if target
support Thumb-1 ISA.
gcc/testsuite/
Backport from trunk r236913.
2016-05-31 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/armv5_thumb_isa.c: New test.
Change-Id: I8c3d583f2bdf61b719edc27a97d66be9a804fa79
| -rw-r--r-- | gcc/config/arm/arm-protos.h | 3 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 4 | ||||
| -rw-r--r-- | gcc/config/arm/arm.h | 8 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c | 8 |
4 files changed, 20 insertions, 3 deletions
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 0083673b161..a794e61076b 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -601,6 +601,9 @@ extern int arm_tune_cortex_a9; interworking clean. */ extern int arm_cpp_interwork; +/* Nonzero if chip supports Thumb 1. */ +extern int arm_arch_thumb1; + /* Nonzero if chip supports Thumb 2. */ extern int arm_arch_thumb2; diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 28161f36c5c..e9e12ddfd5f 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -852,6 +852,9 @@ int arm_tune_cortex_a9 = 0; interworking clean. */ int arm_cpp_interwork = 0; +/* Nonzero if chip supports Thumb 1. */ +int arm_arch_thumb1; + /* Nonzero if chip supports Thumb 2. */ int arm_arch_thumb2; @@ -3170,6 +3173,7 @@ arm_option_override (void) arm_arch7em = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH7EM); arm_arch8 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH8); arm_arch8_1 = ARM_FSET_HAS_CPU2 (insn_flags, FL2_ARCH8_1); + arm_arch_thumb1 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB); arm_arch_thumb2 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB2); arm_arch_xscale = ARM_FSET_HAS_CPU1 (insn_flags, FL_XSCALE); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 6c0a4d1e24f..82a1fc4f6ff 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -478,6 +478,9 @@ extern int arm_tune_cortex_a9; interworking clean. */ extern int arm_cpp_interwork; +/* Nonzero if chip supports Thumb 1. */ +extern int arm_arch_thumb1; + /* Nonzero if chip supports Thumb 2. */ extern int arm_arch_thumb2; @@ -2188,9 +2191,8 @@ extern int making_const_table; (arm_base_arch) \ /* The highest Thumb instruction set version supported by the chip. */ -#define TARGET_ARM_ARCH_ISA_THUMB \ - (arm_arch_thumb2 ? 2 \ - : ((TARGET_ARM_ARCH >= 5 || arm_arch4t) ? 1 : 0)) +#define TARGET_ARM_ARCH_ISA_THUMB \ + (arm_arch_thumb2 ? 2 : (arm_arch_thumb1 ? 1 : 0)) /* Expands to an upper-case char of the target's architectural profile. */ diff --git a/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c b/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c new file mode 100644 index 00000000000..80a00aec978 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c @@ -0,0 +1,8 @@ +/* { dg-require-effective-target arm_arch_v5_ok } */ +/* { dg-add-options arm_arch_v5 } */ + +#if __ARM_ARCH_ISA_THUMB +#error "__ARM_ARCH_ISA_THUMB defined for ARMv5" +#endif + +int foo; |