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authorktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>2015-03-13 10:48:44 +0000
committerktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4>2015-03-13 10:48:44 +0000
commita76dc1894a54087a635ba3506decb76bf38c5137 (patch)
tree03f08c847be5f4df82b03259fef70dd3727660e1
parentdccaa1c0220ef6841dac00b37712930cc7646592 (diff)
[ARM] PR target/64600 Fix another ICE with -mtune=xscale: properly sign-extend mask during constant splitting
PR target/64600 * config/arm/arm.c (arm_gen_constant, AND case): Use ARM_SIGN_EXTEND when constructing AND mask. PR target/64600 * gcc.target/arm/pr64600_1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221413 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/arm.c17
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/arm/pr64600_1.c15
4 files changed, 35 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index eb5a2d9fc8d..8a24aecda88 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-03-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/64600
+ * config/arm/arm.c (arm_gen_constant, AND case): Use
+ ARM_SIGN_EXTEND when constructing AND mask.
+
2015-03-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* graph.c (print_graph_cfg): Make function names visible and append
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 48342d0c0ec..8e484a20377 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -4536,19 +4536,20 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
if ((remainder | shift_mask) != 0xffffffff)
{
+ HOST_WIDE_INT new_val
+ = ARM_SIGN_EXTEND (remainder | shift_mask);
+
if (generate)
{
rtx new_src = subtargets ? gen_reg_rtx (mode) : target;
- insns = arm_gen_constant (AND, mode, cond,
- remainder | shift_mask,
+ insns = arm_gen_constant (AND, SImode, cond, new_val,
new_src, source, subtargets, 1);
source = new_src;
}
else
{
rtx targ = subtargets ? NULL_RTX : target;
- insns = arm_gen_constant (AND, mode, cond,
- remainder | shift_mask,
+ insns = arm_gen_constant (AND, mode, cond, new_val,
targ, source, subtargets, 0);
}
}
@@ -4571,12 +4572,13 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
if ((remainder | shift_mask) != 0xffffffff)
{
+ HOST_WIDE_INT new_val
+ = ARM_SIGN_EXTEND (remainder | shift_mask);
if (generate)
{
rtx new_src = subtargets ? gen_reg_rtx (mode) : target;
- insns = arm_gen_constant (AND, mode, cond,
- remainder | shift_mask,
+ insns = arm_gen_constant (AND, mode, cond, new_val,
new_src, source, subtargets, 1);
source = new_src;
}
@@ -4584,8 +4586,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
{
rtx targ = subtargets ? NULL_RTX : target;
- insns = arm_gen_constant (AND, mode, cond,
- remainder | shift_mask,
+ insns = arm_gen_constant (AND, mode, cond, new_val,
targ, source, subtargets, 0);
}
}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4a776eec092..152d36cf77f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-03-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/64600
+ * gcc.target/arm/pr64600_1.c: New test.
+
2015-03-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/65235
diff --git a/gcc/testsuite/gcc.target/arm/pr64600_1.c b/gcc/testsuite/gcc.target/arm/pr64600_1.c
new file mode 100644
index 00000000000..6ba3fa29690
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr64600_1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=xscale" } */
+
+typedef unsigned int speed_t;
+typedef unsigned int tcflag_t;
+
+struct termios {
+ tcflag_t c_cflag;
+};
+
+speed_t
+cfgetospeed (const struct termios *tp)
+{
+ return tp->c_cflag & 010017;
+}