[ARM] PR63870 Add qualifiers for NEON builtinslinaro-local/cbaylis-test-20150911-aardvark

gcc/ChangeLog: <DATE> Charles Baylis <charles.baylis@linaro.org> * config/arm/arm-builtins.c (enum arm_type_qualifiers): New enumerators qualifier_lane_index, qualifier_struct_load_store_lane_index. (arm_expand_neon_args): New parameter. Remove ellipsis. Handle NEON argument qualifiers. (arm_expand_neon_builtin): Handle NEON argument qualifiers. * config/arm/arm-protos.h: (arm_neon_lane_bounds) New prototype. * config/arm/arm.c (arm_neon_lane_bounds): New function. * config/arm/arm.h (ENDIAN_LANE_N): New macro. Change-Id: Iaa14d8736879fa53776319977eda2089f0a26647 [ARM] PR63870 Mark lane indices of vldN/vstN with appropriate qualifier gcc/ChangeLog: <DATE> Charles Baylis <charles.baylis@linaro.org> * config/arm/arm-builtins.c: (arm_load1_qualifiers) Use qualifier_struct_load_store_lane_index. (arm_storestruct_lane_qualifiers) Likewise. * config/arm/neon.md: (neon_vld1_lane<mode>) Reverse lane numbers for big-endian. (neon_vst1_lane<mode>) Likewise. (neon_vld2_lane<mode>) Likewise. (neon_vst2_lane<mode>) Likewise. (neon_vld3_lane<mode>) Likewise. (neon_vst3_lane<mode>) Likewise. (neon_vld4_lane<mode>) Likewise. (neon_vst4_lane<mode>) Likewise. Change-Id: Ic39898d288701bc5b712490265be688f5620c4e2 [ARM] PR63870 Add test cases gcc/testsuite/ChangeLog: <DATE> Charles Baylis <charles.baylis@linaro.org> * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c: New test. Change-Id: I55478568525838da2ff05d8145e08b45e7a74a47 update f16 test cases Change-Id: I9882af02637ee7128ae822c1de227e4585a01492
author: Charles Baylis <charles.baylis@linaro.org> 2015-06-17 17:08:30 +0100
committer: Charles Baylis <charles.baylis@linaro.org> 2015-09-11 15:39:04 +0100
commit: 9975c07a68a3aae5c5796e35da5def4d3ede3563 (patch)
tree: 48d97bd7b51ecd41a666e9e0d5d6e6c7a4b52d39
parent: 84bb4e67d45a8921cedd2ef64fe3cffd9ee72f44 (diff)
149 files changed, 373 insertions, 473 deletions
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 0f5a1f1aaf8..5780b490ac9 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -77,7 +77,9 @@ enum arm_type_qualifiers
   /* Polynomial types.  */
   qualifier_poly = 0x100,
   /* Lane indices - must be within range of previous argument = a vector.  */
-  qualifier_lane_index = 0x200
+  qualifier_lane_index = 0x200,
+  /* Lane indices for single lane structure loads and stores.  */
+  qualifier_struct_load_store_lane_index = 0x400
 };
 
 /*  The qualifier_internal allows generation of a unary builtin from
@@ -160,7 +162,7 @@ arm_load1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
 static enum arm_type_qualifiers
 arm_load1_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
   = { qualifier_none, qualifier_const_pointer_map_mode,
-      qualifier_none, qualifier_immediate };
+      qualifier_none, qualifier_struct_load_store_lane_index };
 #define LOAD1LANE_QUALIFIERS (arm_load1_lane_qualifiers)
 
 /* The first argument (return type) of a store should be void type,
@@ -179,7 +181,7 @@ arm_store1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
 static enum arm_type_qualifiers
 arm_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
   = { qualifier_void, qualifier_pointer_map_mode,
-      qualifier_none, qualifier_immediate };
+      qualifier_none, qualifier_struct_load_store_lane_index };
 #define STORE1LANE_QUALIFIERS (arm_storestruct_lane_qualifiers)
 
 #define v8qi_UP  V8QImode
@@ -1973,6 +1975,7 @@ typedef enum {
   NEON_ARG_COPY_TO_REG,
   NEON_ARG_CONSTANT,
   NEON_ARG_LANE_INDEX,
+  NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX,
   NEON_ARG_MEMORY,
   NEON_ARG_STOP
 } builtin_arg;
@@ -2030,9 +2033,9 @@ neon_dereference_pointer (tree exp, tree type, machine_mode mem_mode,
 /* Expand a Neon builtin.  */
 static rtx
 arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
-		      int icode, int have_retval, tree exp, ...)
+		      int icode, int have_retval, tree exp,
+		      builtin_arg *args)
 {
-  va_list ap;
   rtx pat;
   tree arg[SIMD_MAX_BUILTIN_ARGS];
   rtx op[SIMD_MAX_BUILTIN_ARGS];
@@ -2047,13 +2050,11 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
 	  || !(*insn_data[icode].operand[0].predicate) (target, tmode)))
     target = gen_reg_rtx (tmode);
 
-  va_start (ap, exp);
-
   formals = TYPE_ARG_TYPES (TREE_TYPE (arm_builtin_decls[fcode]));
 
   for (;;)
     {
-      builtin_arg thisarg = (builtin_arg) va_arg (ap, int);
+      builtin_arg thisarg = args[argc];
 
       if (thisarg == NEON_ARG_STOP)
 	break;
@@ -2089,6 +2090,18 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
 		op[argc] = copy_to_mode_reg (mode[argc], op[argc]);
 	      break;
 
+            case NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX:
+	      gcc_assert (argc > 1);
+	      if (CONST_INT_P (op[argc]))
+		{
+		  arm_neon_lane_bounds (op[argc], 0,
+					GET_MODE_NUNITS (map_mode), exp);
+		  /* Keep to GCC-vector-extension lane indices in the RTL.  */
+		  op[argc] =
+		    GEN_INT (ENDIAN_LANE_N (map_mode, INTVAL (op[argc])));
+		}
+	      goto constant_arg;
+
 	    case NEON_ARG_LANE_INDEX:
 	      /* Previous argument must be a vector, which this indexes.  */
 	      gcc_assert (argc > 0);
@@ -2099,17 +2112,22 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
 		}
 	      /* Fall through - if the lane index isn't a constant then
 		 the next case will error.  */
+
 	    case NEON_ARG_CONSTANT:
+constant_arg:
 	      if (!(*insn_data[icode].operand[opno].predicate)
 		  (op[argc], mode[argc]))
-		error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
-		       "expected %<const int%>", argc + 1);
+		{
+		  error ("%Kargument %d must be a constant immediate",
+			 exp, argc + 1);
+		  return const0_rtx;
+		}
 	      break;
+
             case NEON_ARG_MEMORY:
 	      /* Check if expand failed.  */
 	      if (op[argc] == const0_rtx)
 	      {
-		va_end (ap);
 		return 0;
 	      }
 	      gcc_assert (MEM_P (op[argc]));
@@ -2132,8 +2150,6 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
 	}
     }
 
-  va_end (ap);
-
   if (have_retval)
     switch (argc)
       {
@@ -2245,6 +2261,8 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target)
 
       if (d->qualifiers[qualifiers_k] & qualifier_lane_index)
 	args[k] = NEON_ARG_LANE_INDEX;
+      else if (d->qualifiers[qualifiers_k] & qualifier_struct_load_store_lane_index)
+        args[k] = NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX;
       else if (d->qualifiers[qualifiers_k] & qualifier_immediate)
 	args[k] = NEON_ARG_CONSTANT;
       else if (d->qualifiers[qualifiers_k] & qualifier_maybe_immediate)
@@ -2270,11 +2288,7 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target)
      the function is void, and a 1 if it is not.  */
   return arm_expand_neon_args
 	  (target, d->mode, fcode, icode, !is_void, exp,
-	   args[1],
-	   args[2],
-	   args[3],
-	   args[4],
-	   NEON_ARG_STOP);
+	   &args[1]);
 }
 
 /* Expand an expression EXP that calls a built-in function,
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 8df312f3c67..b855b3defea 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -344,6 +344,10 @@ extern void arm_cpu_builtins (struct cpp_reader *, int);
 
 extern bool arm_is_constant_pool_ref (rtx);
 
+void arm_neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
+			   const_tree exp);
+
+
 /* Flags used to identify the presence of processor capabilities.  */
 
 /* Bit values used to identify processor capabilities.  */
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 5f3180d38ce..6edad703eda 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29800,4 +29800,24 @@ arm_sched_fusion_priority (rtx_insn *insn, int max_pri,
   *pri = tmp;
   return;
 }
+
+/* Bounds-check lanes.  Ensure OPERAND lies between LOW (inclusive) and
+   HIGH (exclusive).  */
+void
+arm_neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
+		      const_tree exp)
+{
+  HOST_WIDE_INT lane;
+  gcc_assert (CONST_INT_P (operand));
+  lane = INTVAL (operand);
+
+  if (lane < low || lane >= high)
+  {
+    if (exp)
+      error ("%Klane %ld out of range %ld - %ld", exp, lane, low, high - 1);
+    else
+      error ("lane %ld out of range %ld - %ld", lane, low, high - 1);
+  }
+}
+
 #include "gt-arm.h"
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index f7a9d638673..d0ab7d02b7f 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -304,6 +304,9 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
 #define TARGET_BPABI false
 #endif
 
+#define ENDIAN_LANE_N(mode, n)  \
+  (BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (mode) - 1 - n : n)
+
 /* Support for a compile-time default CPU, et cetera.  The rules are:
    --with-arch is ignored if -march or -mcpu are specified.
    --with-cpu is ignored if -march or -mcpu are specified, and is overridden
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 26678663a64..251afdc81f1 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -4261,8 +4261,9 @@ if (BYTES_BIG_ENDIAN)
                     UNSPEC_VLD1_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+  operands[3] = GEN_INT (lane);
   if (lane < 0 || lane >= max)
     error ("lane out of range");
   if (max == 1)
@@ -4281,8 +4282,9 @@ if (BYTES_BIG_ENDIAN)
                     UNSPEC_VLD1_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+  operands[3] = GEN_INT (lane);
   int regno = REGNO (operands[0]);
   if (lane < 0 || lane >= max)
     error ("lane out of range");
@@ -4367,8 +4369,9 @@ if (BYTES_BIG_ENDIAN)
 	  UNSPEC_VST1_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+  operands[2] = GEN_INT (lane);
   if (lane < 0 || lane >= max)
     error ("lane out of range");
   if (max == 1)
@@ -4387,7 +4390,7 @@ if (BYTES_BIG_ENDIAN)
 	  UNSPEC_VST1_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[1]);
   if (lane < 0 || lane >= max)
@@ -4396,8 +4399,8 @@ if (BYTES_BIG_ENDIAN)
     {
       lane -= max / 2;
       regno += 2;
-      operands[2] = GEN_INT (lane);
     }
+  operands[2] = GEN_INT (lane);
   operands[1] = gen_rtx_REG (<V_HALF>mode, regno);
   if (max == 2)
     return "vst1.<V_sz_elem>\t{%P1}, %A0";
@@ -4457,7 +4460,7 @@ if (BYTES_BIG_ENDIAN)
                    UNSPEC_VLD2_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[0]);
   rtx ops[4];
@@ -4466,7 +4469,7 @@ if (BYTES_BIG_ENDIAN)
   ops[0] = gen_rtx_REG (DImode, regno);
   ops[1] = gen_rtx_REG (DImode, regno + 2);
   ops[2] = operands[1];
-  ops[3] = operands[3];
+  ops[3] = GEN_INT (lane);
   output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops);
   return "";
 }
@@ -4482,7 +4485,7 @@ if (BYTES_BIG_ENDIAN)
                    UNSPEC_VLD2_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[0]);
   rtx ops[4];
@@ -4572,7 +4575,7 @@ if (BYTES_BIG_ENDIAN)
 	  UNSPEC_VST2_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[1]);
   rtx ops[4];
@@ -4581,7 +4584,7 @@ if (BYTES_BIG_ENDIAN)
   ops[0] = operands[0];
   ops[1] = gen_rtx_REG (DImode, regno);
   ops[2] = gen_rtx_REG (DImode, regno + 2);
-  ops[3] = operands[2];
+  ops[3] = GEN_INT (lane);
   output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops);
   return "";
 }
@@ -4597,7 +4600,7 @@ if (BYTES_BIG_ENDIAN)
            UNSPEC_VST2_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[1]);
   rtx ops[4];
@@ -4716,7 +4719,7 @@ if (BYTES_BIG_ENDIAN)
                    UNSPEC_VLD3_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[0]);
   rtx ops[5];
@@ -4726,7 +4729,7 @@ if (BYTES_BIG_ENDIAN)
   ops[1] = gen_rtx_REG (DImode, regno + 2);
   ops[2] = gen_rtx_REG (DImode, regno + 4);
   ops[3] = operands[1];
-  ops[4] = operands[3];
+  ops[4] = GEN_INT (lane);
   output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
                    ops);
   return "";
@@ -4743,7 +4746,7 @@ if (BYTES_BIG_ENDIAN)
                    UNSPEC_VLD3_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[0]);
   rtx ops[5];
@@ -4888,7 +4891,7 @@ if (BYTES_BIG_ENDIAN)
            UNSPEC_VST3_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[1]);
   rtx ops[5];
@@ -4898,7 +4901,7 @@ if (BYTES_BIG_ENDIAN)
   ops[1] = gen_rtx_REG (DImode, regno);
   ops[2] = gen_rtx_REG (DImode, regno + 2);
   ops[3] = gen_rtx_REG (DImode, regno + 4);
-  ops[4] = operands[2];
+  ops[4] = GEN_INT (lane);
   output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
                    ops);
   return "";
@@ -4915,7 +4918,7 @@ if (BYTES_BIG_ENDIAN)
            UNSPEC_VST3_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[1]);
   rtx ops[5];
@@ -5038,7 +5041,7 @@ if (BYTES_BIG_ENDIAN)
                    UNSPEC_VLD4_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[0]);
   rtx ops[6];
@@ -5049,7 +5052,7 @@ if (BYTES_BIG_ENDIAN)
   ops[2] = gen_rtx_REG (DImode, regno + 4);
   ops[3] = gen_rtx_REG (DImode, regno + 6);
   ops[4] = operands[1];
-  ops[5] = operands[3];
+  ops[5] = GEN_INT (lane);
   output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
                    ops);
   return "";
@@ -5066,7 +5069,7 @@ if (BYTES_BIG_ENDIAN)
                    UNSPEC_VLD4_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[0]);
   rtx ops[6];
@@ -5218,7 +5221,7 @@ if (BYTES_BIG_ENDIAN)
            UNSPEC_VST4_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[1]);
   rtx ops[6];
@@ -5229,7 +5232,7 @@ if (BYTES_BIG_ENDIAN)
   ops[2] = gen_rtx_REG (DImode, regno + 2);
   ops[3] = gen_rtx_REG (DImode, regno + 4);
   ops[4] = gen_rtx_REG (DImode, regno + 6);
-  ops[5] = operands[2];
+  ops[5] = GEN_INT (lane);
   output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
                    ops);
   return "";
@@ -5246,7 +5249,7 @@ if (BYTES_BIG_ENDIAN)
            UNSPEC_VST4_LANE))]
   "TARGET_NEON"
 {
-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+  HOST_WIDE_INT lane = ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
   int regno = REGNO (operands[1]);
   rtx ops[6];
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c
index 2174d6eaa8f..46fa753ca26 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float16x4x2_t
 f_vld2_lane_f16 (float16_t * p, float16x4x2_t v)
 {
   float16x4x2_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2_lane_f16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2_lane_f16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
index 04be713d4bf..d1895f07fe8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float32x2x2_t
 f_vld2_lane_f32 (float32_t * p, float32x2x2_t v)
 {
   float32x2x2_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2_lane_f32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2_lane_f32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
index a03d1653583..19dd5f4fdf3 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 float64x1x2_t
 f_vld2_lane_f64 (float64_t * p, float64x1x2_t v)
 {
   float64x1x2_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld2_lane_f64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld2_lane_f64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
index 3a7aeb32a0e..df3ce8cd41e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 poly8x8x2_t
 f_vld2_lane_p8 (poly8_t * p, poly8x8x2_t v)
 {
   poly8x8x2_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2_lane_p8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2_lane_p8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
index 0b6314c8b66..ad56c8b97a9 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int16x4x2_t
 f_vld2_lane_s16 (int16_t * p, int16x4x2_t v)
 {
   int16x4x2_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2_lane_s16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2_lane_s16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
index 331478025b4..8b7455df05d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int32x2x2_t
 f_vld2_lane_s32 (int32_t * p, int32x2x2_t v)
 {
   int32x2x2_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2_lane_s32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2_lane_s32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
index 351ba40a69f..de0a2c158a5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int64x1x2_t
 f_vld2_lane_s64 (int64_t * p, int64x1x2_t v)
 {
   int64x1x2_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld2_lane_s64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld2_lane_s64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
index 1db7462ba05..ad414a536cc 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int8x8x2_t
 f_vld2_lane_s8 (int8_t * p, int8x8x2_t v)
 {
   int8x8x2_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2_lane_s8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2_lane_s8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
index b65ae561f9b..a80b54d7915 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint16x4x2_t
 f_vld2_lane_u16 (uint16_t * p, uint16x4x2_t v)
 {
   uint16x4x2_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2_lane_u16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2_lane_u16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
index 4990ed0ed02..76db072f2d0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint32x2x2_t
 f_vld2_lane_u32 (uint32_t * p, uint32x2x2_t v)
 {
   uint32x2x2_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2_lane_u32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2_lane_u32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
index 09ff01c54f2..3539a3fea0a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint64x1x2_t
 f_vld2_lane_u64 (uint64_t * p, uint64x1x2_t v)
 {
   uint64x1x2_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld2_lane_u64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld2_lane_u64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
index d0c40a13ad1..20e8465a308 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint8x8x2_t
 f_vld2_lane_u8 (uint8_t * p, uint8x8x2_t v)
 {
   uint8x8x2_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2_lane_u8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2_lane_u8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c
index 83ae82c8242..f921d32ac53 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float16x8x2_t
 f_vld2q_lane_f16 (float16_t * p, float16x8x2_t v)
 {
   float16x8x2_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2q_lane_f16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2q_lane_f16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
index 84853f3522e..0c3c947c2ae 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float32x4x2_t
 f_vld2q_lane_f32 (float32_t * p, float32x4x2_t v)
 {
   float32x4x2_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2q_lane_f32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2q_lane_f32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
index 4f106bc9b47..5d2eb2db35c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 float64x2x2_t
 f_vld2q_lane_f64 (float64_t * p, float64x2x2_t v)
 {
   float64x2x2_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2q_lane_f64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2q_lane_f64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
index 04eab142715..b48aca408c4 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 poly8x16x2_t
 f_vld2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
 {
   poly8x16x2_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld2q_lane_p8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld2q_lane_p8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
index 048517d5f08..c3062c96f83 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int16x8x2_t
 f_vld2q_lane_s16 (int16_t * p, int16x8x2_t v)
 {
   int16x8x2_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2q_lane_s16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2q_lane_s16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
index 620bafb53b3..bfb4f0a653b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int32x4x2_t
 f_vld2q_lane_s32 (int32_t * p, int32x4x2_t v)
 {
   int32x4x2_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2q_lane_s32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2q_lane_s32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
index e182c6d5c1e..84d453a9678 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int64x2x2_t
 f_vld2q_lane_s64 (int64_t * p, int64x2x2_t v)
 {
   int64x2x2_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2q_lane_s64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2q_lane_s64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
index a58538e02ad..ec37d1b1d21 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int8x16x2_t
 f_vld2q_lane_s8 (int8_t * p, int8x16x2_t v)
 {
   int8x16x2_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld2q_lane_s8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld2q_lane_s8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
index cf6e9a12f99..3588131b2ca 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint16x8x2_t
 f_vld2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
 {
   uint16x8x2_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2q_lane_u16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld2q_lane_u16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
index 6945cf0d912..7f272149fe8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint32x4x2_t
 f_vld2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
 {
   uint32x4x2_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2q_lane_u32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld2q_lane_u32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
index 84f09594922..828f7d32f09 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint64x2x2_t
 f_vld2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
 {
   uint64x2x2_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2q_lane_u64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld2q_lane_u64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
index 82ecfe25484..08fe7491f0d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint8x16x2_t
 f_vld2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
 {
   uint8x16x2_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld2q_lane_u8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld2q_lane_u8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c
index 21b7861ba75..d068d7958e8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float16x4x3_t
 f_vld3_lane_f16 (float16_t * p, float16x4x3_t v)
 {
   float16x4x3_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3_lane_f16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3_lane_f16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
index 4db8b7ca02b..6d13e2b71c5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float32x2x3_t
 f_vld3_lane_f32 (float32_t * p, float32x2x3_t v)
 {
   float32x2x3_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3_lane_f32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3_lane_f32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
index 74659768b92..63d55516059 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 float64x1x3_t
 f_vld3_lane_f64 (float64_t * p, float64x1x3_t v)
 {
   float64x1x3_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld3_lane_f64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld3_lane_f64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
index 712c67c72c7..a6a9666433c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 poly8x8x3_t
 f_vld3_lane_p8 (poly8_t * p, poly8x8x3_t v)
 {
   poly8x8x3_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3_lane_p8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3_lane_p8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
index 22e11d39316..69fd90da4d4 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int16x4x3_t
 f_vld3_lane_s16 (int16_t * p, int16x4x3_t v)
 {
   int16x4x3_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3_lane_s16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3_lane_s16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
index ed4f50bea4c..01816e8dbb0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int32x2x3_t
 f_vld3_lane_s32 (int32_t * p, int32x2x3_t v)
 {
   int32x2x3_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3_lane_s32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3_lane_s32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
index ae7b35e4ccf..f2a6dbd4593 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int64x1x3_t
 f_vld3_lane_s64 (int64_t * p, int64x1x3_t v)
 {
   int64x1x3_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld3_lane_s64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld3_lane_s64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
index 320ef376af6..5d5f8452aae 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int8x8x3_t
 f_vld3_lane_s8 (int8_t * p, int8x8x3_t v)
 {
   int8x8x3_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3_lane_s8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3_lane_s8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
index a00253a345e..8be04edccf2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint16x4x3_t
 f_vld3_lane_u16 (uint16_t * p, uint16x4x3_t v)
 {
   uint16x4x3_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3_lane_u16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3_lane_u16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
index d53ead36796..bf890d3cba9 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint32x2x3_t
 f_vld3_lane_u32 (uint32_t * p, uint32x2x3_t v)
 {
   uint32x2x3_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3_lane_u32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3_lane_u32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
index e9b44278d09..926718ee573 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint64x1x3_t
 f_vld3_lane_u64 (uint64_t * p, uint64x1x3_t v)
 {
   uint64x1x3_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld3_lane_u64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld3_lane_u64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
index 3afff9f95d3..d129bba7816 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint8x8x3_t
 f_vld3_lane_u8 (uint8_t * p, uint8x8x3_t v)
 {
   uint8x8x3_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3_lane_u8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3_lane_u8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c
index 95ec3913eef..ed4d7d579b5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float16x8x3_t
 f_vld3q_lane_f16 (float16_t * p, float16x8x3_t v)
 {
   float16x8x3_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3q_lane_f16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3q_lane_f16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
index e38799cc540..0c276c45a13 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float32x4x3_t
 f_vld3q_lane_f32 (float32_t * p, float32x4x3_t v)
 {
   float32x4x3_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3q_lane_f32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3q_lane_f32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
index c84c6c8e0da..2c666c6e937 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 float64x2x3_t
 f_vld3q_lane_f64 (float64_t * p, float64x2x3_t v)
 {
   float64x2x3_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3q_lane_f64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3q_lane_f64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
index 1dea0d4e895..2041472f697 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 poly8x16x3_t
 f_vld3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
 {
   poly8x16x3_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld3q_lane_p8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld3q_lane_p8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
index 03f59f04926..7b7b2b68324 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int16x8x3_t
 f_vld3q_lane_s16 (int16_t * p, int16x8x3_t v)
 {
   int16x8x3_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3q_lane_s16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3q_lane_s16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
index 57315ba9bca..c8db25675ed 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int32x4x3_t
 f_vld3q_lane_s32 (int32_t * p, int32x4x3_t v)
 {
   int32x4x3_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3q_lane_s32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3q_lane_s32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
index fff4f80599d..e35097178ff 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int64x2x3_t
 f_vld3q_lane_s64 (int64_t * p, int64x2x3_t v)
 {
   int64x2x3_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3q_lane_s64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3q_lane_s64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
index 9c340e078ba..1b1c682402b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int8x16x3_t
 f_vld3q_lane_s8 (int8_t * p, int8x16x3_t v)
 {
   int8x16x3_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld3q_lane_s8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld3q_lane_s8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
index 3dfaacbf970..adbc42f1f6f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint16x8x3_t
 f_vld3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
 {
   uint16x8x3_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3q_lane_u16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld3q_lane_u16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
index 9d4ed461a9d..c79388a487e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint32x4x3_t
 f_vld3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
 {
   uint32x4x3_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3q_lane_u32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld3q_lane_u32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
index ca188a8748a..7513140c37d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint64x2x3_t
 f_vld3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
 {
   uint64x2x3_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3q_lane_u64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld3q_lane_u64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
index 5ca835ed2b1..5fec76ec0fd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint8x16x3_t
 f_vld3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
 {
   uint8x16x3_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld3q_lane_u8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld3q_lane_u8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c
index bd7ecf06690..b5d5adf3a51 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float16x4x4_t
 f_vld4_lane_f16 (float16_t * p, float16x4x4_t v)
 {
   float16x4x4_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4_lane_f16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4_lane_f16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
index f956ee6b62d..183036f4f5d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float32x2x4_t
 f_vld4_lane_f32 (float32_t * p, float32x2x4_t v)
 {
   float32x2x4_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4_lane_f32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4_lane_f32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
index 52763b4903b..655c27f2159 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 float64x1x4_t
 f_vld4_lane_f64 (float64_t * p, float64x1x4_t v)
 {
   float64x1x4_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld4_lane_f64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld4_lane_f64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
index 8f9d3eeabdb..7bc5140d904 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 poly8x8x4_t
 f_vld4_lane_p8 (poly8_t * p, poly8x8x4_t v)
 {
   poly8x8x4_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4_lane_p8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4_lane_p8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
index 53f51a0f0b5..5881a89fd73 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int16x4x4_t
 f_vld4_lane_s16 (int16_t * p, int16x4x4_t v)
 {
   int16x4x4_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4_lane_s16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4_lane_s16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
index 7b8396edab9..02282d93f78 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int32x2x4_t
 f_vld4_lane_s32 (int32_t * p, int32x2x4_t v)
 {
   int32x2x4_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4_lane_s32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4_lane_s32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
index 8cc138eadea..162b5c4c669 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int64x1x4_t
 f_vld4_lane_s64 (int64_t * p, int64x1x4_t v)
 {
   int64x1x4_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld4_lane_s64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld4_lane_s64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
index 1c3bcf375a7..4949410d367 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int8x8x4_t
 f_vld4_lane_s8 (int8_t * p, int8x8x4_t v)
 {
   int8x8x4_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4_lane_s8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4_lane_s8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
index 2ac73af886b..16d54e9c539 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint16x4x4_t
 f_vld4_lane_u16 (uint16_t * p, uint16x4x4_t v)
 {
   uint16x4x4_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4_lane_u16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4_lane_u16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
index e37e03823c7..c65bd30a897 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint32x2x4_t
 f_vld4_lane_u32 (uint32_t * p, uint32x2x4_t v)
 {
   uint32x2x4_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4_lane_u32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4_lane_u32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
index 96f0bb89645..e8f2884307e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint64x1x4_t
 f_vld4_lane_u64 (uint64_t * p, uint64x1x4_t v)
 {
   uint64x1x4_t res;
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld4_lane_u64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   res = vld4_lane_u64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
index e8de33513ff..cb7f48735ab 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint8x8x4_t
 f_vld4_lane_u8 (uint8_t * p, uint8x8x4_t v)
 {
   uint8x8x4_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4_lane_u8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4_lane_u8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c
index c27559f4ee8..e9947d4b831 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float16x8x4_t
 f_vld4q_lane_f16 (float16_t * p, float16x8x4_t v)
 {
   float16x8x4_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4q_lane_f16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4q_lane_f16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
index 93d57302778..8d7d03e5c8b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 float32x4x4_t
 f_vld4q_lane_f32 (float32_t * p, float32x4x4_t v)
 {
   float32x4x4_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4q_lane_f32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4q_lane_f32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
index 062e0ebaf00..d0ce4e59cd4 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 float64x2x4_t
 f_vld4q_lane_f64 (float64_t * p, float64x2x4_t v)
 {
   float64x2x4_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4q_lane_f64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4q_lane_f64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
index 32ae95b9804..bb1cb310158 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 poly8x16x4_t
 f_vld4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
 {
   poly8x16x4_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld4q_lane_p8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld4q_lane_p8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
index f4a7225f3a3..d96fe0e0fef 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int16x8x4_t
 f_vld4q_lane_s16 (int16_t * p, int16x8x4_t v)
 {
   int16x8x4_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4q_lane_s16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4q_lane_s16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
index 45dd197fe7b..446ff43e5d2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 int32x4x4_t
 f_vld4q_lane_s32 (int32_t * p, int32x4x4_t v)
 {
   int32x4x4_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4q_lane_s32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4q_lane_s32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
index 5a01d051b75..df02f397701 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int64x2x4_t
 f_vld4q_lane_s64 (int64_t * p, int64x2x4_t v)
 {
   int64x2x4_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4q_lane_s64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4q_lane_s64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
index db6691791f8..d7573c192fb 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 int8x16x4_t
 f_vld4q_lane_s8 (int8_t * p, int8x16x4_t v)
 {
   int8x16x4_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld4q_lane_s8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld4q_lane_s8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
index 5a27639477c..05be38bb2ba 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint16x8x4_t
 f_vld4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
 {
   uint16x8x4_t res;
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4q_lane_u16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   res = vld4q_lane_u16 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
index 5d8a57080fe..572c6d055ab 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 uint32x4x4_t
 f_vld4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
 {
   uint32x4x4_t res;
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4q_lane_u32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   res = vld4q_lane_u32 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
index 92b4c517db2..a6828df325d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint64x2x4_t
 f_vld4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
 {
   uint64x2x4_t res;
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4q_lane_u64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   res = vld4q_lane_u64 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
index 293416da9a4..8b5eb43412b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
@@ -2,16 +2,15 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 uint8x16x4_t
 f_vld4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
 {
   uint8x16x4_t res;
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld4q_lane_u8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   res = vld4q_lane_u8 (p, v, -1);
   return res;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c
index dbf5241b591..93d6e5c1de2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_f16 (float16_t * p, float16x4x2_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2_lane_f16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2_lane_f16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
index 1a39625a604..a0ea45bad0f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_f32 (float32_t * p, float32x2x2_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2_lane_f32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2_lane_f32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
index 367471517ce..2eca26f9f14 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2_lane_f64 (float64_t * p, float64x1x2_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst2_lane_f64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst2_lane_f64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
index 770fe9da3f0..3692d7d228a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_p8 (poly8_t * p, poly8x8x2_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2_lane_p8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2_lane_p8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
index ac89d03b415..94ac769ebb6 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_s16 (int16_t * p, int16x4x2_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2_lane_s16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2_lane_s16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
index 4bbceb65437..3ef5687444d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_s32 (int32_t * p, int32x2x2_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2_lane_s32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2_lane_s32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
index da60b9bfef1..1e3c20210d6 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2_lane_s64 (int64_t * p, int64x1x2_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst2_lane_s64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst2_lane_s64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
index b5bf3d685a7..a96b1b48ca9 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_s8 (int8_t * p, int8x8x2_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2_lane_s8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2_lane_s8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
index bfdc5c0b15c..970be4a95e8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_u16 (uint16_t * p, uint16x4x2_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2_lane_u16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2_lane_u16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
index e32c6ff3d63..4c8e2f166aa 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_u32 (uint32_t * p, uint32x2x2_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2_lane_u32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2_lane_u32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
index 03546bdd97f..dfb0de2e647 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2_lane_u64 (uint64_t * p, uint64x1x2_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst2_lane_u64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst2_lane_u64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
index 74da14c0305..4877ea22592 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2_lane_u8 (uint8_t * p, uint8x8x2_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2_lane_u8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2_lane_u8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c
index e3c0296534b..729314eb529 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2q_lane_f16 (float16_t * p, float16x8x2_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2q_lane_f16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2q_lane_f16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
index 246c60cef01..75f7dd6c08b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2q_lane_f32 (float32_t * p, float32x4x2_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2q_lane_f32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2q_lane_f32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
index a1029217975..9a230567495 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2q_lane_f64 (float64_t * p, float64x2x2_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2q_lane_f64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2q_lane_f64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
index 8966b539b83..c3f24337c98 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst2q_lane_p8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst2q_lane_p8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
index 19d22a1f2b1..82ae1e433c1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2q_lane_s16 (int16_t * p, int16x8x2_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2q_lane_s16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2q_lane_s16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
index bbb772c0ccf..27208bd6a03 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2q_lane_s32 (int32_t * p, int32x4x2_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2q_lane_s32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2q_lane_s32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
index 6efc6813395..a66d55b503b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2q_lane_s64 (int64_t * p, int64x2x2_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2q_lane_s64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2q_lane_s64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
index 7c0eb499985..7a3338b327b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2q_lane_s8 (int8_t * p, int8x16x2_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst2q_lane_s8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst2q_lane_s8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
index b079a34f75a..999ee7065c5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2q_lane_u16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst2q_lane_u16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
index b919e2b81fc..fd4422dbd4d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2q_lane_u32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst2q_lane_u32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
index 7d31d65ee90..78863b58086 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2q_lane_u64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst2q_lane_u64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
index 9c35ce97570..e7463e1287d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst2q_lane_u8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst2q_lane_u8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c
index 406dfd410a1..1f262a16187 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_f16 (float16_t * p, float16x4x3_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3_lane_f16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3_lane_f16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
index 1d7a57ef4c5..0cec8807b65 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_f32 (float32_t * p, float32x2x3_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3_lane_f32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3_lane_f32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
index 5e9b9ea91de..d63aa1fd7de 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3_lane_f64 (float64_t * p, float64x1x3_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst3_lane_f64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst3_lane_f64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
index 7599a19571c..0122b75f3d1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_p8 (poly8_t * p, poly8x8x3_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3_lane_p8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3_lane_p8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
index f8b856de6a8..2c57d2bcc93 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_s16 (int16_t * p, int16x4x3_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3_lane_s16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3_lane_s16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
index 7fbf2e896c7..c0b3a5b274b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_s32 (int32_t * p, int32x2x3_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3_lane_s32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3_lane_s32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
index 801dcc048cd..2c2d0437e4a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3_lane_s64 (int64_t * p, int64x1x3_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst3_lane_s64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst3_lane_s64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
index 1623326ceab..b93d69a2bab 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_s8 (int8_t * p, int8x8x3_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3_lane_s8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3_lane_s8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
index 7304da6504f..ce6025d2c89 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_u16 (uint16_t * p, uint16x4x3_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3_lane_u16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3_lane_u16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
index 4c1c4b78846..5696034a560 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_u32 (uint32_t * p, uint32x2x3_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3_lane_u32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3_lane_u32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
index adc8fb2a15f..9a36915294e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3_lane_u64 (uint64_t * p, uint64x1x3_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst3_lane_u64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst3_lane_u64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
index 8a55b5539c0..9004f3d2682 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3_lane_u8 (uint8_t * p, uint8x8x3_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3_lane_u8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3_lane_u8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c
index 4e8b24cff8a..6c24a5ea48c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3q_lane_f16 (float16_t * p, float16x8x3_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3q_lane_f16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3q_lane_f16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
index 8a081fef39b..d1ffc04a452 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3q_lane_f32 (float32_t * p, float32x4x3_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3q_lane_f32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3q_lane_f32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
index 2d867f2dc11..e165f2a64d0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3q_lane_f64 (float64_t * p, float64x2x3_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3q_lane_f64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3q_lane_f64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
index 295f6b6fcb2..7fb3c96e355 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst3q_lane_p8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst3q_lane_p8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
index 160c90c3996..de8ae54cde8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3q_lane_s16 (int16_t * p, int16x8x3_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3q_lane_s16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3q_lane_s16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
index 0324f3ce11c..6502bcf1c4f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3q_lane_s32 (int32_t * p, int32x4x3_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3q_lane_s32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3q_lane_s32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
index b56512610e0..c6d8236588d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3q_lane_s64 (int64_t * p, int64x2x3_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3q_lane_s64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3q_lane_s64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
index 5e35bb9959b..2b486190be1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3q_lane_s8 (int8_t * p, int8x16x3_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst3q_lane_s8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst3q_lane_s8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
index 9eaae3b66a4..6d68051ed2a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3q_lane_u16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst3q_lane_u16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
index 62339fcdb14..78b28a02e41 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3q_lane_u32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst3q_lane_u32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
index 39044cc226d..fe4f52ea829 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3q_lane_u64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst3q_lane_u64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
index bf48dbb3d59..74e49db38d4 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst3q_lane_u8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst3q_lane_u8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c
index 0fe65116712..6ada55ea4b3 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_f16 (float16_t * p, float16x4x4_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4_lane_f16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4_lane_f16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
index 7f045120ef0..00a8a50c4ee 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_f32 (float32_t * p, float32x2x4_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4_lane_f32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4_lane_f32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
index ddee219d376..7cb45ca2fbd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4_lane_f64 (float64_t * p, float64x1x4_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst4_lane_f64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst4_lane_f64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
index 14491acbff1..8b7fef3c3c2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_p8 (poly8_t * p, poly8x8x4_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4_lane_p8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4_lane_p8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
index 8434a9b30ef..e62691c571b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_s16 (int16_t * p, int16x4x4_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4_lane_s16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4_lane_s16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
index 53a4a46ae56..ced39caec46 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_s32 (int32_t * p, int32x2x4_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4_lane_s32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4_lane_s32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
index 051c8eb9fc2..fe77b4d733d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4_lane_s64 (int64_t * p, int64x1x4_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst4_lane_s64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst4_lane_s64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
index 33967ac515a..b287a59d541 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_s8 (int8_t * p, int8x8x4_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4_lane_s8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4_lane_s8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
index 8e358dd7d6b..2144dc4bfe0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_u16 (uint16_t * p, uint16x4x4_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4_lane_u16 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4_lane_u16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
index 4f7899f04a2..576036c8a38 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_u32 (uint32_t * p, uint32x2x4_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4_lane_u32 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4_lane_u32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
index 9fb06d18097..b6040b79b2b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4_lane_u64 (uint64_t * p, uint64x1x4_t v)
 {
-  /* { dg-error "lane 1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst4_lane_u64 (p, v, 1);
-  /* { dg-error "lane -1 out of range 0 - 0" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
   vst4_lane_u64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
index 3a183224bc9..4ed80cf6f69 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4_lane_u8 (uint8_t * p, uint8x8x4_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4_lane_u8 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4_lane_u8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c
index 9a5f09aa5fa..7327c03d126 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4q_lane_f16 (float16_t * p, float16x8x4_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4q_lane_f16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4q_lane_f16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
index 72f7d0287d8..ca01289e275 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4q_lane_f32 (float32_t * p, float32x4x4_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4q_lane_f32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4q_lane_f32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
index c5f721fbed2..e2b7fb85b57 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4q_lane_f64 (float64_t * p, float64x2x4_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4q_lane_f64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4q_lane_f64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
index 3e57c954de6..fb8f4ca300c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst4q_lane_p8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst4q_lane_p8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
index 5fcbc7f03cb..4855b73b44d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4q_lane_s16 (int16_t * p, int16x8x4_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4q_lane_s16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4q_lane_s16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
index c039c8729e0..29a8a696e1f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4q_lane_s32 (int32_t * p, int32x4x4_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4q_lane_s32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4q_lane_s32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
index 824a7e7e9d0..297cae8dac7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4q_lane_s64 (int64_t * p, int64x2x4_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4q_lane_s64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4q_lane_s64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
index 0850c674d5d..10c70cc6ed7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4q_lane_s8 (int8_t * p, int8x16x4_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst4q_lane_s8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst4q_lane_s8 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
index 6950a22921e..d0063ea0a7b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
 {
-  /* { dg-error "lane 8 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4q_lane_u16 (p, v, 8);
-  /* { dg-error "lane -1 out of range 0 - 7" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
   vst4q_lane_u16 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
index 3c9a1718445..89b4c526f1a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
@@ -2,14 +2,13 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 
 void
 f_vst4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
 {
-  /* { dg-error "lane 4 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4q_lane_u32 (p, v, 4);
-  /* { dg-error "lane -1 out of range 0 - 3" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
   vst4q_lane_u32 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
index 8543e58da00..ba697c45b13 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
 {
-  /* { dg-error "lane 2 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4q_lane_u64 (p, v, 2);
-  /* { dg-error "lane -1 out of range 0 - 1" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
   vst4q_lane_u64 (p, v, -1);
   return;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
index ade4801600e..61f8ce2cdb7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
@@ -2,15 +2,14 @@
 
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
-/* { dg-excess-errors "" { xfail arm*-*-* } } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 void
 f_vst4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
 {
-  /* { dg-error "lane 16 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst4q_lane_u8 (p, v, 16);
-  /* { dg-error "lane -1 out of range 0 - 15" "" { xfail arm*-*-* } 0 } */
+  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
   vst4q_lane_u8 (p, v, -1);
   return;
 }
author	Charles Baylis <charles.baylis@linaro.org>	2015-06-17 17:08:30 +0100
committer	Charles Baylis <charles.baylis@linaro.org>	2015-09-11 15:39:04 +0100
commit	9975c07a68a3aae5c5796e35da5def4d3ede3563 (patch)
tree	48d97bd7b51ecd41a666e9e0d5d6e6c7a4b52d39
parent	84bb4e67d45a8921cedd2ef64fe3cffd9ee72f44 (diff)