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authorYvan Roux <yvan.roux@linaro.org>2013-04-08 15:14:44 +0200
committerYvan Roux <yvan.roux@linaro.org>2013-04-08 15:14:44 +0200
commit006504c49ba773db12e8972fdd54a1149d448dc2 (patch)
tree695439167e61bf730d9bc3ceaf31f6439d753945
parent9eca2b532ac8521a21b41de48b6a7544ca3b2fe5 (diff)
parent034f63918a9df19d726d9be3b48d7d0b323d6c2b (diff)
Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 197188).
-rw-r--r--ChangeLog.linaro4
-rw-r--r--gcc/ChangeLog275
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/ada/ChangeLog9
-rw-r--r--gcc/ada/seh_init.c8
-rw-r--r--gcc/config.gcc16
-rw-r--r--gcc/config/arm/arm.c106
-rw-r--r--gcc/config/arm/arm.h15
-rw-r--r--gcc/config/fr30/fr30.md6
-rw-r--r--gcc/config/i386/i386.c16
-rw-r--r--gcc/config/i386/i386.h6
-rw-r--r--gcc/config/sh/linux.h12
-rw-r--r--gcc/config/sh/netbsd-elf.h12
-rw-r--r--gcc/config/sh/sh.c8
-rw-r--r--gcc/config/sh/sh.h9
-rw-r--r--gcc/config/sh/sh.md14
-rw-r--r--gcc/config/sh/sh.opt6
-rw-r--r--gcc/config/sh/t-sh2
-rw-r--r--gcc/config/tilegx/tilegx-builtins.h1
-rw-r--r--gcc/config/tilegx/tilegx.c36
-rw-r--r--gcc/config/tilegx/tilegx.h6
-rw-r--r--gcc/config/tilegx/tilegx.md181
-rw-r--r--gcc/config/tilepro/tilepro.c5
-rw-r--r--gcc/config/tilepro/tilepro.h2
-rw-r--r--gcc/cp/ChangeLog38
-rw-r--r--gcc/cp/decl.c8
-rw-r--r--gcc/cp/init.c2
-rw-r--r--gcc/cp/parser.c18
-rw-r--r--gcc/cp/semantics.c10
-rw-r--r--gcc/cp/tree.c3
-rw-r--r--gcc/doc/cppopts.texi2
-rw-r--r--gcc/doc/generic.texi4
-rw-r--r--gcc/doc/invoke.texi111
-rw-r--r--gcc/fortran/ChangeLog20
-rw-r--r--gcc/fortran/check.c2
-rw-r--r--gcc/fortran/expr.c3
-rw-r--r--gcc/fortran/resolve.c2
-rw-r--r--gcc/fortran/trans-intrinsic.c5
-rw-r--r--gcc/gcc.c59
-rw-r--r--gcc/gimple-low.c16
-rw-r--r--gcc/godump.c6
-rw-r--r--gcc/testsuite/ChangeLog74
-rw-r--r--gcc/testsuite/g++.dg/cpp0x/initlist-defarg1.C36
-rw-r--r--gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this9.C19
-rw-r--r--gcc/testsuite/g++.dg/cpp0x/trailing9.C12
-rw-r--r--gcc/testsuite/g++.dg/template/crash115.C3
-rw-r--r--gcc/testsuite/g++.dg/template/typename20.C11
-rw-r--r--gcc/testsuite/g++.dg/torture/pr56403.C12
-rw-r--r--gcc/testsuite/gcc.dg/torture/pr55481.c16
-rw-r--r--gcc/testsuite/gcc.dg/torture/pr56443.c29
-rw-r--r--gcc/testsuite/gcc.dg/torture/pr56488.c31
-rw-r--r--gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c68
-rw-r--r--gcc/testsuite/gcc.dg/vect/slp-38.c24
-rw-r--r--gcc/testsuite/gcc.target/i386/pr56560.c19
-rw-r--r--gcc/testsuite/gcc.target/sh/pr49880-1.c22
-rw-r--r--gcc/testsuite/gcc.target/sh/pr49880-2.c22
-rw-r--r--gcc/testsuite/gcc.target/sh/pr49880-3.c22
-rw-r--r--gcc/testsuite/gcc.target/sh/pr49880-4.c19
-rw-r--r--gcc/testsuite/gcc.target/sh/pr49880-5.c19
-rw-r--r--gcc/testsuite/gfortran.dg/class_56.f9021
-rw-r--r--gcc/testsuite/gfortran.dg/intrinsic_size_4.f9018
-rw-r--r--gcc/testsuite/gfortran.dg/transfer_intrinsic_5.f9050
-rw-r--r--gcc/toplev.c12
-rw-r--r--gcc/tree-ssa-loop-ivopts.c42
-rw-r--r--gcc/tree-vect-slp.c22
-rw-r--r--gcc/tree-vect-stmts.c3
-rw-r--r--libgcc/ChangeLog24
-rw-r--r--libgcc/config.host12
-rw-r--r--libgcc/config/sh/lib1funcs.S20
-rw-r--r--libstdc++-v3/ChangeLog38
-rw-r--r--libstdc++-v3/include/bits/atomic_base.h20
-rw-r--r--libstdc++-v3/include/bits/vector.tcc3
-rw-r--r--libstdc++-v3/include/std/atomic4
-rw-r--r--libstdc++-v3/include/std/mutex10
-rw-r--r--libstdc++-v3/libsupc++/exception_ptr.h4
-rw-r--r--libstdc++-v3/testsuite/23_containers/vector/allocator/copy.cc2
-rw-r--r--libstdc++-v3/testsuite/23_containers/vector/allocator/copy_assign.cc4
-rw-r--r--libstdc++-v3/testsuite/23_containers/vector/allocator/minimal.cc1
-rw-r--r--libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc4
-rw-r--r--libstdc++-v3/testsuite/23_containers/vector/allocator/swap.cc4
-rw-r--r--libstdc++-v3/testsuite/29_atomics/atomic/operators/56011.cc29
-rw-r--r--libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/56012.cc26
-rw-r--r--libstdc++-v3/testsuite/30_threads/lock_guard/cons/1.cc9
83 files changed, 1596 insertions, 310 deletions
diff --git a/ChangeLog.linaro b/ChangeLog.linaro
index 06bb6f8a9e2..ec86ac05d4e 100644
--- a/ChangeLog.linaro
+++ b/ChangeLog.linaro
@@ -1,3 +1,7 @@
+2013-04-08 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org>
+
+ Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 197188).
+
2013-04-03 Christophe Lyon <christophe.lyon@linaro.org>
Partial backport from mainline r195977:
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 724f4aed3da..4f6fd2b4944 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,278 @@
+2013-03-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ * toplev.c (process_options): Do not disable -fomit-frame-pointer on a
+ general basis if unwind info is requested and ACCUMULATE_OUTGOING_ARGS
+ is not enabled.
+
+2013-03-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.c (tilegx_expand_prologue): Avoid
+ double-decrement of next_scratch_regno.
+
+2013-03-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.md (insn_v1mulu): Fix predicates on
+ input operands.
+ (insn_v1mulus): Ditto.
+ (insn_v2muls): Ditto.
+
+2013-03-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.h (ASM_OUTPUT_ADDR_VEC_ELT): Delete
+ extra tab.
+ (ASM_OUTPUT_ADDR_DIFF_ELT): Ditto.
+
+2013-03-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.md (*sibcall_insn): Fix type atribute
+ for jr.
+ (*sibcall_value): Ditto.
+
+2013-03-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.md (insn_mnz_<mode>): Replaced by ...
+ (insn_mnz_v8qi): ... this ...
+ (insn_mnz_v4hi): ... and this. Replace (const_int 0) with the
+ vector equivalent.
+ (insn_v<n>mnz): Replaced by ...
+ (insn_v1mnz): ... this ...
+ (insn_v2mnz): ... and this. Replace (const_int 0) with the vector
+ equivalent.
+ (insn_mz_<mode>): Replaced by ...
+ (insn_mz_v8qi): ... this ...
+ (insn_mz_v4hi): ... and this. Replace (const_int 0) with the
+ vector equivalent.
+ (insn_v<n>mz): Replaced by ...
+ (insn_v1mz): ... this ...
+ (insn_v2mz): ... and this. Replace (const_int 0) with the vector
+ equivalent.
+
+2013-03-26 Eric Botcazou <ebotcazou@adacore.com>
+
+ * doc/invoke.texi (SPARC options): Remove -mlittle-endian.
+
+2013-03-26 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline:
+ 2013-03-13 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/56608
+ * tree-vect-slp.c (vect_schedule_slp): Do not remove scalar
+ calls when vectorizing basic-blocks.
+
+ 2013-03-05 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/56270
+ * tree-vect-slp.c (vect_schedule_slp): Clear vectorized stmts
+ of loads after scheduling an SLP instance.
+
+2013-03-26 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-26 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.h (PROFILE_BEFORE_PROLOGUE): Define.
+ * config/tilegx/tilepro.h (PROFILE_BEFORE_PROLOGUE): Define.
+
+2013-03-26 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-25 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add
+ TILEGX_INSN_SHUFFLEBYTES1.
+ * config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for
+ shufflebytes1.
+ (tilegx_builtins): Ditto.
+ * config/tilegx/tilegx.md (insn_shufflebytes1): New pattern.
+
+2013-03-26 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-25 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.c (expand_set_cint64_one_inst): Inline
+ tests for constraint J, K, N, P.
+
+2013-03-26 Walter Lee <walt@tilera.com>
+
+ Backport from mainline:
+ 2013-03-25 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.c (tilegx_asm_preferred_eh_data_format):
+ Use indirect/pcrel encoding.
+ * config/tilepro/tilepro.c (tilepro_asm_preferred_eh_data_format):
+ Ditto.
+
+2013-03-25 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline:
+ 2013-03-13 Oleg Endo <olegendo@gcc.gnu.org>
+ 2013-03-14 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ PR target/49880
+ * config/sh/sh.opt (FPU_SINGLE_ONLY): New mask.
+ (musermode): Convert to Var(TARGET_USERMODE).
+ * config/sh/sh.h (SELECT_SH2A_SINGLE_ONLY, SELECT_SH4_SINGLE_ONLY,
+ MASK_ARCH): Add MASK_FPU_SINGLE_ONLY.
+ * config/sh/sh.c (sh_option_override): Use
+ TARGET_FPU_DOUBLE || TARGET_FPU_SINGLE_ONLY for call-fp case.
+ * config/sh/sh.md (udivsi3_i1, divsi3_i1): Remove ! TARGET_SH4
+ condition.
+ (udivsi3_i4, divsi3_i4): Use TARGET_FPU_DOUBLE condition instead of
+ TARGET_SH4.
+ (udivsi3_i4_single, divsi3_i4_single): Use
+ TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE instead of TARGET_HARD_SH4.
+ * config/sh/linux.h (TARGET_DEFAULT): Remove MASK_USERMODE.
+ (SUBTARGET_OVERRIDE_OPTIONS): Set TARGET_USERMODE as default.
+ * config/sh/netbsd-elf.h (TARGET_DEFAULT): Remove MASK_USERMODE.
+ (SUBTARGET_OVERRIDE_OPTIONS): New.
+
+2013-03-25 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline:
+ 2012-04-03 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ * config/sh/t-sh (MULTILIB_MATCHES): Match m2a-single-only
+ to m2a-single instead of m2e.
+
+2013-03-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/56560
+ * config/i386/i386.h (ix86_args): Define only if USED_FOR_TARGET
+ isn't defined.
+
+2013-03-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/56560
+ * config/i386/i386.c (init_cumulative_args): Also set
+ cum->callee_return_avx256_p.
+ (ix86_function_arg): Set cum->callee_pass_avx256_p. Set
+ cfun->machine->callee_pass_avx256_p only when MODE == VOIDmode.
+
+ * config/i386/i386.h (ix86_args): Add callee_pass_avx256_p and
+ callee_return_avx256_p.
+
+2013-03-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ Backport from mainline:
+ 2012-12-04 Ian Lance Taylor <iant@google.com>
+
+ * godump.c (find_dummy_types): Output a dummy type if we couldn't
+ output the real type.
+
+2013-03-20 Jack Howarth <howarth@bromo.med.uc.edu>
+
+ PR bootstrap/56258
+ * doc/generic.texi (POINTER_PLUS_EXPR): Use @item instead of @itemx.
+ (PLUS_EXPR): Likewise.
+ * doc/cppopts.texi (--help): Likewise.
+ * doc/invoke.texi (-fenable-@var{kind}-@var{pass}): Likewise.
+ (-fdump-rtl-cprop_hardreg): Likewise.
+ (-fdump-rtl-csa): Likewise.
+ (-fdump-rtl-dce): Likewise.
+ (-fdump-rtl-dbr): Likewise.
+ (-fdump-rtl-into_cfglayout): Likewise.
+ (-fdump-rtl-outof_cfglayout): Likewise.
+
+2013-03-18 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/56470
+ * config/arm/arm.c (shift_op): Validate RTL pattern on the fly.
+ (arm_print_operand, case 'S'): Don't use shift_operator to validate
+ the RTL.
+
+2013-03-14 Seth LaForge <sethml@google.com>
+
+ PR target/56351
+ Backport from mainline
+ 2012-10-22 Julian Brown <julian@codesourcery.com>
+
+ * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Avoid subreg'ing
+ VFP D registers in big-endian mode.
+
+2013-03-08 Joey Ye <joey.ye@arm.com>
+
+ Backport from mainline
+ 2013-03-06 Joey Ye <joey.ye@arm.com>
+
+ PR lto/50293
+ * gcc.c (convert_white_space): New function.
+ (main): Handles white space in function name.
+
+2013-03-06 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline
+ 2013-03-06 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/56529
+ * config/sh/sh.c (sh_option_override): Check for TARGET_DYNSHIFT
+ instead of TARGET_SH2 for call-table case. Do not set sh_div_strategy
+ to SH_DIV_CALL_TABLE for TARGET_SH2.
+ * config.gcc (sh_multilibs): Add m2 and m2a to sh*-*-linux* multilib
+ list.
+ * doc/invoke.texi (SH options): Use table for mdiv= option. Document
+ mdiv= call-div1, call-fp, call-table options.
+
+2013-03-06 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config.gcc (arm*-*-rtemself*): New.
+ (arm*-*-rtems*): Removed.
+ (arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*): Rename
+ "arm*-*-rtemseabi*" to "arm*-*-rtems*".
+
+2013-03-01 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2012-12-12 Zdenek Dvorak <ook@ucw.cz>
+
+ PR tree-optimization/55481
+ * tree-ssa-loop-ivopts.c (rewrite_use_nonlinear_expr): Fall
+ back to general rewriting if we cannot leave an original biv
+ definition alone.
+
+2013-03-01 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2012-04-10 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/52888
+ * gimple-low.c (gimple_check_call_args): Properly account for
+ compatible aggregate types.
+
+2013-02-26 Nick Clifton <nickc@redhat.com>
+
+ PR target/56453
+ Import this patch from the mainline:
+
+ 2012-08-17 Nick Clifton <nickc@redhat.com>
+
+ * config/fr30/fr30.md (cbranchsi4): Remove mode from comparison.
+ (branch_true): Likewise.
+ (branch_false): Likewise.
+
+2013-02-26 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/56443
+ * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): For
+ overaligned types, pass TYPE_UNSIGNED (scalar_type) as second argument
+ to type_for_mode langhook.
+
2013-02-21 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/56258
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index f5af81fe987..d8640f92d6b 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20130226
+20130328
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index b9be951cc49..f6d83887674 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,9 +1,14 @@
+2013-03-08 Cesar Strauss <cestrauss@gmail.com>
+
+ PR ada/52123
+ * seh_init.c (Raise_From_Signal_Handler): Declare as no-return.
+ (__gnat_SEH_error_handler): Likewise. Remove final return.
+
2013-02-21 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/56258
* gnat-style.texi (@title): Remove @hfill.
- * projects.texi: Avoid line wrapping inside of @pxref or
- @xref.
+ * projects.texi: Avoid line wrapping inside of @pxref or @xref.
2013-02-20 Eric Botcazou <ebotcazou@adacore.com>
diff --git a/gcc/ada/seh_init.c b/gcc/ada/seh_init.c
index a7f3879577a..5e05e95a20c 100644
--- a/gcc/ada/seh_init.c
+++ b/gcc/ada/seh_init.c
@@ -6,7 +6,7 @@
* *
* C Implementation File *
* *
- * Copyright (C) 2005-2011, Free Software Foundation, Inc. *
+ * Copyright (C) 2005-2013, Free Software Foundation, Inc. *
* *
* GNAT is free software; you can redistribute it and/or modify it under *
* terms of the GNU General Public License as published by the Free Soft- *
@@ -60,7 +60,8 @@ extern struct Exception_Data _abort_signal;
#define Raise_From_Signal_Handler \
ada__exceptions__raise_from_signal_handler
-extern void Raise_From_Signal_Handler (struct Exception_Data *, const char *);
+extern void Raise_From_Signal_Handler (struct Exception_Data *, const char *)
+ ATTRIBUTE_NORETURN;
#if defined (_WIN32)
@@ -71,7 +72,7 @@ extern void Raise_From_Signal_Handler (struct Exception_Data *, const char *);
extern void _global_unwind2 (void *);
EXCEPTION_DISPOSITION __gnat_SEH_error_handler
-(struct _EXCEPTION_RECORD*, void*, struct _CONTEXT*, void*);
+(struct _EXCEPTION_RECORD*, void*, struct _CONTEXT*, void*) ATTRIBUTE_NORETURN;
EXCEPTION_DISPOSITION
__gnat_SEH_error_handler (struct _EXCEPTION_RECORD* ExceptionRecord,
@@ -193,7 +194,6 @@ __gnat_SEH_error_handler (struct _EXCEPTION_RECORD* ExceptionRecord,
#endif
Raise_From_Signal_Handler (exception, msg);
- return 0; /* This is never reached, avoid compiler warning */
}
#if defined (_WIN64)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 8ce8b051e57..21d7702e780 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -257,7 +257,7 @@ case ${target} in
| arm*-*-elf \
| arm*-*-freebsd* \
| arm*-*-linux* \
- | arm*-*-rtems* \
+ | arm*-*-rtemself* \
| arm*-*-uclinux* \
| arm*-wince-pe* \
| mips-sgi-irix6.5 \
@@ -927,7 +927,11 @@ arm*-*-ecos-elf)
tm_file="dbxelf.h elfos.h newlib-stdint.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h arm/ecos-elf.h"
tmake_file="arm/t-arm arm/t-arm-elf"
;;
-arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*)
+arm*-*-rtemself*)
+ tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h arm/rtems-elf.h rtems.h newlib-stdint.h"
+ tmake_file="arm/t-arm arm/t-arm-elf t-rtems arm/t-rtems"
+ ;;
+arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)
# The BPABI long long divmod functions return a 128-bit value in
# registers r0-r3. Correctly modeling that requires the use of
# TImode.
@@ -941,7 +945,7 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*)
tmake_file="${tmake_file} arm/t-bpabi"
use_gcc_stdint=wrap
;;
- arm*-*-rtemseabi*)
+ arm*-*-rtems*)
tm_file="${tm_file} rtems.h arm/rtems-eabi.h newlib-stdint.h"
tmake_file="${tmake_file} arm/t-bpabi t-rtems arm/t-rtems-eabi"
;;
@@ -954,10 +958,6 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*)
esac
tm_file="${tm_file} arm/aout.h arm/arm.h"
;;
-arm*-*-rtems*)
- tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h arm/rtems-elf.h rtems.h newlib-stdint.h"
- tmake_file="arm/t-arm arm/t-arm-elf t-rtems arm/t-rtems"
- ;;
arm*-*-elf)
tm_file="dbxelf.h elfos.h newlib-stdint.h arm/unknown-elf.h arm/elf.h arm/aout.h arm/arm.h"
tmake_file="arm/t-arm arm/t-arm-elf"
@@ -2383,7 +2383,7 @@ sh-*-elf* | sh[12346l]*-*-elf* | \
sh[1234]*) sh_multilibs=${sh_cpu_target} ;;
sh64* | sh5*) sh_multilibs=m5-32media,m5-32media-nofpu,m5-compact,m5-compact-nofpu,m5-64media,m5-64media-nofpu ;;
sh-superh-*) sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
- sh*-*-linux*) sh_multilibs=m1,m3e,m4 ;;
+ sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4 ;;
sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;;
*) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;;
esac
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 32e0dc97bd5..05008424785 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -15442,72 +15442,88 @@ shift_op (rtx op, HOST_WIDE_INT *amountp)
const char * mnem;
enum rtx_code code = GET_CODE (op);
- switch (GET_CODE (XEXP (op, 1)))
- {
- case REG:
- case SUBREG:
- *amountp = -1;
- break;
-
- case CONST_INT:
- *amountp = INTVAL (XEXP (op, 1));
- break;
-
- default:
- gcc_unreachable ();
- }
-
switch (code)
{
case ROTATE:
- gcc_assert (*amountp != -1);
- *amountp = 32 - *amountp;
- code = ROTATERT;
+ if (!CONST_INT_P (XEXP (op, 1)))
+ {
+ output_operand_lossage ("invalid shift operand");
+ return NULL;
+ }
- /* Fall through. */
+ code = ROTATERT;
+ *amountp = 32 - INTVAL (XEXP (op, 1));
+ mnem = "ror";
+ break;
case ASHIFT:
case ASHIFTRT:
case LSHIFTRT:
case ROTATERT:
mnem = arm_shift_nmem(code);
+ if (CONST_INT_P (XEXP (op, 1)))
+ {
+ *amountp = INTVAL (XEXP (op, 1));
+ }
+ else if (REG_P (XEXP (op, 1)))
+ {
+ *amountp = -1;
+ return mnem;
+ }
+ else
+ {
+ output_operand_lossage ("invalid shift operand");
+ return NULL;
+ }
break;
case MULT:
/* We never have to worry about the amount being other than a
power of 2, since this case can never be reloaded from a reg. */
- gcc_assert (*amountp != -1);
+ if (!CONST_INT_P (XEXP (op, 1)))
+ {
+ output_operand_lossage ("invalid shift operand");
+ return NULL;
+ }
+
+ *amountp = INTVAL (XEXP (op, 1)) & 0xFFFFFFFF;
+
+ /* Amount must be a power of two. */
+ if (*amountp & (*amountp - 1))
+ {
+ output_operand_lossage ("invalid shift operand");
+ return NULL;
+ }
+
*amountp = int_log2 (*amountp);
return ARM_LSL_NAME;
default:
- gcc_unreachable ();
+ output_operand_lossage ("invalid shift operand");
+ return NULL;
}
- if (*amountp != -1)
+ /* This is not 100% correct, but follows from the desire to merge
+ multiplication by a power of 2 with the recognizer for a
+ shift. >=32 is not a valid shift for "lsl", so we must try and
+ output a shift that produces the correct arithmetical result.
+ Using lsr #32 is identical except for the fact that the carry bit
+ is not set correctly if we set the flags; but we never use the
+ carry bit from such an operation, so we can ignore that. */
+ if (code == ROTATERT)
+ /* Rotate is just modulo 32. */
+ *amountp &= 31;
+ else if (*amountp != (*amountp & 31))
{
- /* This is not 100% correct, but follows from the desire to merge
- multiplication by a power of 2 with the recognizer for a
- shift. >=32 is not a valid shift for "lsl", so we must try and
- output a shift that produces the correct arithmetical result.
- Using lsr #32 is identical except for the fact that the carry bit
- is not set correctly if we set the flags; but we never use the
- carry bit from such an operation, so we can ignore that. */
- if (code == ROTATERT)
- /* Rotate is just modulo 32. */
- *amountp &= 31;
- else if (*amountp != (*amountp & 31))
- {
- if (code == ASHIFT)
- mnem = "lsr";
- *amountp = 32;
- }
-
- /* Shifts of 0 are no-ops. */
- if (*amountp == 0)
- return NULL;
+ if (code == ASHIFT)
+ mnem = "lsr";
+ *amountp = 32;
}
+ /* Shifts of 0 are no-ops. */
+ if (*amountp == 0)
+ return NULL;
+
return mnem;
}
@@ -17895,12 +17911,6 @@ arm_print_operand (FILE *stream, rtx x, int code)
HOST_WIDE_INT val;
const char *shift;
- if (!shift_operator (x, SImode))
- {
- output_operand_lossage ("invalid shift operand");
- break;
- }
-
shift = shift_op (x, &val);
if (shift)
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index eabc6f8e03b..0d875463a73 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1139,11 +1139,18 @@ enum reg_class
/* FPA registers can't do subreg as all values are reformatted to internal
precision. In VFPv1, VFP registers could only be accessed in the mode
they were set, so subregs would be invalid there too. However, we don't
- support VFPv1 at the moment, and the restriction was lifted in VFPv2. */
+ support VFPv1 at the moment, and the restriction was lifted in VFPv2.
+ In big-endian mode, modes greater than word size (i.e. DFmode) are stored in
+ VFP registers in little-endian order. We can't describe that accurately to
+ GCC, so avoid taking subregs of such values. */
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
- (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
- ? reg_classes_intersect_p (FPA_REGS, (CLASS)) \
- : 0)
+ (TARGET_VFP \
+ ? TARGET_BIG_END \
+ && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD \
+ || GET_MODE_SIZE (TO) > UNITS_PER_WORD) \
+ && reg_classes_intersect_p (VFP_REGS, (CLASS)) \
+ : GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
+ && reg_classes_intersect_p (FPA_REGS, (CLASS)))
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS (TARGET_THUMB1 ? LO_REGS : GENERAL_REGS)
diff --git a/gcc/config/fr30/fr30.md b/gcc/config/fr30/fr30.md
index 6b35599837f..5e4140a820a 100644
--- a/gcc/config/fr30/fr30.md
+++ b/gcc/config/fr30/fr30.md
@@ -940,7 +940,7 @@
(compare:CC (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonmemory_operand" "")))
(set (pc)
- (if_then_else (match_operator:CC 0 "ordered_comparison_operator"
+ (if_then_else (match_operator 0 "ordered_comparison_operator"
[(reg:CC 16) (const_int 0)])
(label_ref (match_operand 3 "" ""))
(pc)))]
@@ -980,7 +980,7 @@
(define_insn "*branch_true"
[(set (pc)
- (if_then_else (match_operator:CC 0 "comparison_operator"
+ (if_then_else (match_operator 0 "comparison_operator"
[(reg:CC 16)
(const_int 0)])
(label_ref (match_operand 1 "" ""))
@@ -1034,7 +1034,7 @@
;; branch occurs if the test is false, so the %B operator is used.
(define_insn "*branch_false"
[(set (pc)
- (if_then_else (match_operator:CC 0 "comparison_operator"
+ (if_then_else (match_operator 0 "comparison_operator"
[(reg:CC 16)
(const_int 0)])
(pc)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c1f6c880c81..7a441c73237 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -5592,7 +5592,10 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Argument info to initialize */
{
/* The return value of this function uses 256bit AVX modes. */
if (caller)
- cfun->machine->callee_return_avx256_p = true;
+ {
+ cfun->machine->callee_return_avx256_p = true;
+ cum->callee_return_avx256_p = true;
+ }
else
cfun->machine->caller_return_avx256_p = true;
}
@@ -6863,11 +6866,20 @@ ix86_function_arg (cumulative_args_t cum_v, enum machine_mode omode,
{
/* This argument uses 256bit AVX modes. */
if (cum->caller)
- cfun->machine->callee_pass_avx256_p = true;
+ cum->callee_pass_avx256_p = true;
else
cfun->machine->caller_pass_avx256_p = true;
}
+ if (cum->caller && mode == VOIDmode)
+ {
+ /* This function is called with MODE == VOIDmode immediately
+ before the call instruction is emitted. We copy callee 256bit
+ AVX info from the current CUM here. */
+ cfun->machine->callee_return_avx256_p = cum->callee_return_avx256_p;
+ cfun->machine->callee_pass_avx256_p = cum->callee_pass_avx256_p;
+ }
+
return arg;
}
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 80d19f1daf2..835ea10d184 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1474,6 +1474,7 @@ enum reg_class
/* 1 if N is a possible register number for function argument passing. */
#define FUNCTION_ARG_REGNO_P(N) ix86_function_arg_regno_p (N)
+#ifndef USED_FOR_TARGET
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
hold all necessary information about the function itself
@@ -1502,7 +1503,12 @@ typedef struct ix86_args {
in SSE registers. Otherwise 0. */
enum calling_abi call_abi; /* Set to SYSV_ABI for sysv abi. Otherwise
MS_ABI for ms abi. */
+ /* Nonzero if it passes 256bit AVX modes. */
+ BOOL_BITFIELD callee_pass_avx256_p : 1;
+ /* Nonzero if it returns 256bit AVX modes. */
+ BOOL_BITFIELD callee_return_avx256_p : 1;
} CUMULATIVE_ARGS;
+#endif
/* Initialize a variable CUM of type CUMULATIVE_ARGS
for a call to a function whose data type is FNTYPE.
diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h
index a5c2734214b..3dad514e6d0 100644
--- a/gcc/config/sh/linux.h
+++ b/gcc/config/sh/linux.h
@@ -40,7 +40,7 @@ along with GCC; see the file COPYING3. If not see
#undef TARGET_DEFAULT
#define TARGET_DEFAULT \
- (TARGET_CPU_DEFAULT | MASK_USERMODE | TARGET_ENDIAN_DEFAULT \
+ (TARGET_CPU_DEFAULT | TARGET_ENDIAN_DEFAULT \
| TARGET_OPT_DEFAULT | MASK_SOFT_ATOMIC)
#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
@@ -135,3 +135,13 @@ along with GCC; see the file COPYING3. If not see
/* Install the __sync libcalls. */
#undef TARGET_INIT_LIBFUNCS
#define TARGET_INIT_LIBFUNCS sh_init_sync_libfuncs
+
+#undef SUBTARGET_OVERRIDE_OPTIONS
+#define SUBTARGET_OVERRIDE_OPTIONS \
+ do \
+ { \
+ /* Set -musermode if it hasn't been specified. */ \
+ if (global_options_set.x_TARGET_USERMODE == 0) \
+ TARGET_USERMODE = true; \
+ } \
+ while (0)
diff --git a/gcc/config/sh/netbsd-elf.h b/gcc/config/sh/netbsd-elf.h
index f5a820b1363..7add00e2bca 100644
--- a/gcc/config/sh/netbsd-elf.h
+++ b/gcc/config/sh/netbsd-elf.h
@@ -60,7 +60,7 @@ along with GCC; see the file COPYING3. If not see
#undef TARGET_DEFAULT
#define TARGET_DEFAULT \
- (TARGET_CPU_DEFAULT | MASK_USERMODE | TARGET_ENDIAN_DEFAULT)
+ (TARGET_CPU_DEFAULT | TARGET_ENDIAN_DEFAULT)
/* Define because we use the label and we do not need them. */
#define NO_PROFILE_COUNTERS 1
@@ -96,3 +96,13 @@ while (0)
#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2
#undef SH_DIV_STR_FOR_SIZE
#define SH_DIV_STR_FOR_SIZE "call2"
+
+#undef SUBTARGET_OVERRIDE_OPTIONS
+#define SUBTARGET_OVERRIDE_OPTIONS \
+ do \
+ { \
+ /* Set -musermode if it hasn't been specified. */ \
+ if (global_options_set.x_TARGET_USERMODE == 0) \
+ TARGET_USERMODE = true; \
+ } \
+ while (0)
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index f828ed49721..1c7233f706d 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -682,11 +682,11 @@ sh_option_override (void)
if (! strcmp (sh_div_str, "call-div1"))
sh_div_strategy = SH_DIV_CALL_DIV1;
else if (! strcmp (sh_div_str, "call-fp")
- && (TARGET_FPU_DOUBLE
- || (TARGET_HARD_SH4 && TARGET_SH2E)
+ && (TARGET_FPU_DOUBLE || TARGET_FPU_SINGLE_ONLY
|| (TARGET_SHCOMPACT && TARGET_FPU_ANY)))
sh_div_strategy = SH_DIV_CALL_FP;
- else if (! strcmp (sh_div_str, "call-table") && TARGET_SH2)
+ else if (! strcmp (sh_div_str, "call-table")
+ && (TARGET_SH3 || TARGET_SH2A))
sh_div_strategy = SH_DIV_CALL_TABLE;
else
/* Pick one that makes most sense for the target in general.
@@ -706,8 +706,6 @@ sh_option_override (void)
sh_div_strategy = SH_DIV_CALL_FP;
/* SH1 .. SH3 cores often go into small-footprint systems, so
default to the smallest implementation available. */
- else if (TARGET_SH2) /* ??? EXPERIMENTAL */
- sh_div_strategy = SH_DIV_CALL_TABLE;
else
sh_div_strategy = SH_DIV_CALL_DIV1;
}
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 10e87f88c53..8b7dd1db81d 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -208,14 +208,16 @@ do { \
| MASK_SH2 | MASK_SH1)
#define SELECT_SH2A_NOFPU (MASK_HARD_SH2A | MASK_SH2 | MASK_SH1)
#define SELECT_SH2A_SINGLE_ONLY (MASK_SH_E | MASK_HARD_SH2A | MASK_SH2 \
- | MASK_SH1 | MASK_FPU_SINGLE)
+ | MASK_SH1 | MASK_FPU_SINGLE \
+ | MASK_FPU_SINGLE_ONLY)
#define SELECT_SH2A_SINGLE (MASK_SH_E | MASK_HARD_SH2A \
| MASK_FPU_SINGLE | MASK_HARD_SH2A_DOUBLE \
| MASK_SH2 | MASK_SH1)
#define SELECT_SH3 (MASK_SH3 | SELECT_SH2)
#define SELECT_SH3E (MASK_SH_E | MASK_FPU_SINGLE | SELECT_SH3)
#define SELECT_SH4_NOFPU (MASK_HARD_SH4 | SELECT_SH3)
-#define SELECT_SH4_SINGLE_ONLY (MASK_HARD_SH4 | SELECT_SH3E)
+#define SELECT_SH4_SINGLE_ONLY (MASK_HARD_SH4 | SELECT_SH3E \
+ | MASK_FPU_SINGLE_ONLY)
#define SELECT_SH4 (MASK_SH4 | MASK_SH_E | MASK_HARD_SH4 \
| SELECT_SH3)
#define SELECT_SH4_SINGLE (MASK_FPU_SINGLE | SELECT_SH4)
@@ -282,7 +284,8 @@ do { \
/* Reset all target-selection flags. */
#define MASK_ARCH (MASK_SH1 | MASK_SH2 | MASK_SH3 | MASK_SH_E | MASK_SH4 \
| MASK_HARD_SH2A | MASK_HARD_SH2A_DOUBLE | MASK_SH4A \
- | MASK_HARD_SH4 | MASK_FPU_SINGLE | MASK_SH5)
+ | MASK_HARD_SH4 | MASK_FPU_SINGLE | MASK_SH5 \
+ | MASK_FPU_SINGLE_ONLY)
/* This defaults us to big-endian. */
#ifndef TARGET_ENDIAN_DEFAULT
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 2d72d701a4f..cbe0b2c01b5 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -1753,7 +1753,7 @@
(clobber (reg:SI PR_REG))
(clobber (reg:SI R4_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
- "TARGET_SH1 && (! TARGET_SH4 || TARGET_DIVIDE_CALL_DIV1)"
+ "TARGET_SH1 && TARGET_DIVIDE_CALL_DIV1"
"jsr @%1%#"
[(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
@@ -1817,7 +1817,7 @@
(clobber (reg:SI R5_REG))
(use (reg:PSI FPSCR_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
- "TARGET_SH4 && ! TARGET_FPU_SINGLE"
+ "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
"jsr @%1%#"
[(set_attr "type" "sfunc")
(set_attr "fp_mode" "double")
@@ -1836,7 +1836,8 @@
(clobber (reg:SI R4_REG))
(clobber (reg:SI R5_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
- "(TARGET_HARD_SH4 || TARGET_SHCOMPACT) && TARGET_FPU_SINGLE"
+ "(TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE || TARGET_SHCOMPACT)
+ && TARGET_FPU_SINGLE"
"jsr @%1%#"
[(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
@@ -1959,7 +1960,7 @@
(clobber (reg:SI R2_REG))
(clobber (reg:SI R3_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
- "TARGET_SH1 && (! TARGET_SH4 || TARGET_DIVIDE_CALL_DIV1)"
+ "TARGET_SH1 && TARGET_DIVIDE_CALL_DIV1"
"jsr @%1%#"
[(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
@@ -2090,7 +2091,7 @@
(clobber (reg:DF DR2_REG))
(use (reg:PSI FPSCR_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
- "TARGET_SH4 && ! TARGET_FPU_SINGLE"
+ "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
"jsr @%1%#"
[(set_attr "type" "sfunc")
(set_attr "fp_mode" "double")
@@ -2104,7 +2105,8 @@
(clobber (reg:DF DR2_REG))
(clobber (reg:SI R2_REG))
(use (match_operand:SI 1 "arith_reg_operand" "r"))]
- "(TARGET_HARD_SH4 || TARGET_SHCOMPACT) && TARGET_FPU_SINGLE"
+ "(TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE || TARGET_SHCOMPACT)
+ && TARGET_FPU_SINGLE"
"jsr @%1%#"
[(set_attr "type" "sfunc")
(set_attr "needs_delay_slot" "yes")])
diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
index bf3f64d7a98..0389fcea76b 100644
--- a/gcc/config/sh/sh.opt
+++ b/gcc/config/sh/sh.opt
@@ -25,6 +25,10 @@ Mask(SH_E)
;; Set if the default precision of th FPU is single.
Mask(FPU_SINGLE)
+;; Set if the a double-precision FPU is present but is restricted to
+;; single precision usage only.
+Mask(FPU_SINGLE_ONLY)
+
;; Set if we should generate code using type 2A insns.
Mask(HARD_SH2A)
@@ -332,7 +336,7 @@ Target RejectNegative Joined UInteger Var(sh_multcost) Init(-1)
Cost to assume for a multiply insn
musermode
-Target Report RejectNegative Mask(USERMODE)
+Target Report RejectNegative Var(TARGET_USERMODE)
Don't generate privileged-mode only code; implies -mno-inline-ic_invalidate if the inline code would not work in user mode.
;; We might want to enable this by default for TARGET_HARD_SH4, because
diff --git a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh
index 1d305ee5193..320fe0b681b 100644
--- a/gcc/config/sh/t-sh
+++ b/gcc/config/sh/t-sh
@@ -37,7 +37,7 @@ MULTILIB_MATCHES = $(shell \
for abi in m1,m2,m3,m4-nofpu,m4-100-nofpu,m4-200-nofpu,m4-400,m4-500,m4-340,m4-300-nofpu,m4al,m4a-nofpu \
m1,m2,m2a-nofpu \
m2e,m3e,m4-single-only,m4-100-single-only,m4-200-single-only,m4-300-single-only,m4a-single-only \
- m2e,m2a-single-only \
+ m2a-single,m2a-single-only \
m4-single,m4-100-single,m4-200-single,m4-300-single,m4a-single \
m4,m4-100,m4-200,m4-300,m4a \
m5-32media,m5-compact,m5-32media \
diff --git a/gcc/config/tilegx/tilegx-builtins.h b/gcc/config/tilegx/tilegx-builtins.h
index 49067ae0b26..1206d5ee901 100644
--- a/gcc/config/tilegx/tilegx-builtins.h
+++ b/gcc/config/tilegx/tilegx-builtins.h
@@ -194,6 +194,7 @@ enum tilegx_builtin
TILEGX_INSN_SHRU,
TILEGX_INSN_SHRUX,
TILEGX_INSN_SHUFFLEBYTES,
+ TILEGX_INSN_SHUFFLEBYTES1,
TILEGX_INSN_ST,
TILEGX_INSN_ST1,
TILEGX_INSN_ST2,
diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index 424027ffae2..81e015d49bc 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -1352,14 +1352,16 @@ expand_set_cint64_one_inst (rtx dest_reg,
}
else if (!three_wide_only)
{
- rtx imm_op = GEN_INT (val);
-
- if (satisfies_constraint_J (imm_op)
- || satisfies_constraint_K (imm_op)
- || satisfies_constraint_N (imm_op)
- || satisfies_constraint_P (imm_op))
+ /* Test for the following constraints: J, K, N, P. We avoid
+ generating an rtx and using existing predicates because we
+ can be testing and rejecting a lot of constants, and GEN_INT
+ is O(N). */
+ if ((val >= -32768 && val <= 65535)
+ || ((val == (val & 0xFF) * 0x0101010101010101LL))
+ || (val == ((trunc_int_for_mode (val, QImode) & 0xFFFF)
+ * 0x0001000100010001LL)))
{
- emit_move_insn (dest_reg, imm_op);
+ emit_move_insn (dest_reg, GEN_INT (val));
return true;
}
}
@@ -2842,6 +2844,7 @@ static struct tile_builtin_info tilegx_builtin_info[TILEGX_BUILTIN_max] = {
{ CODE_FOR_lshrdi3, NULL }, /* shru */
{ CODE_FOR_lshrsi3, NULL }, /* shrux */
{ CODE_FOR_insn_shufflebytes, NULL }, /* shufflebytes */
+ { CODE_FOR_insn_shufflebytes1, NULL }, /* shufflebytes1 */
{ CODE_FOR_insn_st, NULL }, /* st */
{ CODE_FOR_insn_st1, NULL }, /* st1 */
{ CODE_FOR_insn_st2, NULL }, /* st2 */
@@ -3170,6 +3173,7 @@ static const struct tilegx_builtin_def tilegx_builtins[] = {
{ "__insn_shrux", TILEGX_INSN_SHRUX, true, "iii" },
{ "__insn_shruxi", TILEGX_INSN_SHRUX, true, "iii" },
{ "__insn_shufflebytes", TILEGX_INSN_SHUFFLEBYTES, true, "llll" },
+ { "__insn_shufflebytes1", TILEGX_INSN_SHUFFLEBYTES1, true, "lll" },
{ "__insn_st", TILEGX_INSN_ST, false, "vpl" },
{ "__insn_st1", TILEGX_INSN_ST1, false, "vpl" },
{ "__insn_st2", TILEGX_INSN_ST2, false, "vpl" },
@@ -3944,11 +3948,10 @@ tilegx_expand_prologue (void)
if (r == NULL_RTX)
{
- rtx p = compute_frame_addr (offset, &next_scratch_regno);
- r = gen_rtx_REG (Pmode, next_scratch_regno--);
- reg_save_addr[which_scratch] = r;
-
- emit_insn (gen_rtx_SET (VOIDmode, r, p));
+ int prev_scratch_regno = next_scratch_regno;
+ r = compute_frame_addr (offset, &next_scratch_regno);
+ if (prev_scratch_regno != next_scratch_regno)
+ reg_save_addr[which_scratch] = r;
}
else
{
@@ -4735,13 +4738,8 @@ tilegx_reorg (void)
int
tilegx_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
{
- if (flag_pic)
- {
- int type = TARGET_32BIT ? DW_EH_PE_sdata4 : DW_EH_PE_sdata8;
- return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type;
- }
- else
- return DW_EH_PE_absptr;
+ int type = TARGET_32BIT ? DW_EH_PE_sdata4 : DW_EH_PE_sdata8;
+ return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type;
}
diff --git a/gcc/config/tilegx/tilegx.h b/gcc/config/tilegx/tilegx.h
index 081ecc1756a..2e97aff135e 100644
--- a/gcc/config/tilegx/tilegx.h
+++ b/gcc/config/tilegx/tilegx.h
@@ -285,6 +285,8 @@ enum reg_class
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = tilegx_initial_elimination_offset((FROM),(TO)))
+#define PROFILE_BEFORE_PROLOGUE 1
+
#define FUNCTION_PROFILER(FILE, LABELNO) \
tilegx_function_profiler (FILE, LABELNO)
@@ -444,7 +446,7 @@ enum reg_class
{ \
char label[256]; \
ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \
- fprintf (FILE, "\t%s ", \
+ fprintf (FILE, "%s ", \
integer_asm_op (GET_MODE_SIZE (Pmode), TRUE)); \
assemble_name (FILE, label); \
fprintf (FILE, "\n"); \
@@ -456,7 +458,7 @@ enum reg_class
{ \
char label[256]; \
ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \
- fprintf (FILE, "\t%s ", \
+ fprintf (FILE, "%s ", \
integer_asm_op (GET_MODE_SIZE (Pmode), TRUE)); \
assemble_name (FILE, label); \
ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL)); \
diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md
index 048fe3a90c5..5a16fecb3b1 100644
--- a/gcc/config/tilegx/tilegx.md
+++ b/gcc/config/tilegx/tilegx.md
@@ -2338,7 +2338,7 @@
"@
jr\t%r0
j\t%p0"
- [(set_attr "type" "X1,X1")])
+ [(set_attr "type" "Y1,X1")])
(define_expand "sibcall_value"
[(parallel [(set (match_operand 0 "" "")
@@ -2357,7 +2357,7 @@
"@
jr\t%r1
j\t%p1"
- [(set_attr "type" "X1,X1")])
+ [(set_attr "type" "Y1,X1")])
(define_insn "jump"
[(set (pc) (label_ref (match_operand 0 "" "")))]
@@ -3705,6 +3705,15 @@
"shufflebytes\t%0, %r2, %r3"
[(set_attr "type" "X0")])
+(define_insn "insn_shufflebytes1"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "rO")
+ (match_operand:DI 2 "reg_or_0_operand" "rO")]
+ UNSPEC_INSN_SHUFFLEBYTES))]
+ ""
+ "shufflebytes\t%0, %r1, %r2"
+ [(set_attr "type" "X0")])
+
;; stores
(define_expand "insn_st"
@@ -4334,57 +4343,147 @@
;; insn_v1mz
;; insn_v2mnz
;; insn_v2mz
-(define_insn "insn_mnz_<mode>"
- [(set (match_operand:VEC48MODE 0 "register_operand" "=r")
- (if_then_else:VEC48MODE
- (ne:VEC48MODE
- (match_operand:VEC48MODE 1 "reg_or_0_operand" "rO")
- (const_int 0))
- (match_operand:VEC48MODE 2 "reg_or_0_operand" "rO")
- (const_int 0)))]
- ""
- "v<n>mnz\t%0, %r1, %r2"
+(define_insn "insn_mnz_v8qi"
+ [(set (match_operand:V8QI 0 "register_operand" "=r")
+ (if_then_else:V8QI
+ (ne:V8QI
+ (match_operand:V8QI 1 "reg_or_0_operand" "rO")
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)]))
+ (match_operand:V8QI 2 "reg_or_0_operand" "rO")
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])))]
+ ""
+ "v1mnz\t%0, %r1, %r2"
[(set_attr "type" "X01")])
-(define_expand "insn_v<n>mnz"
+(define_expand "insn_v1mnz"
[(set (match_operand:DI 0 "register_operand" "")
- (if_then_else:VEC48MODE
- (ne:VEC48MODE
+ (if_then_else:V8QI
+ (ne:V8QI
(match_operand:DI 1 "reg_or_0_operand" "")
- (const_int 0))
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])
+ )
(match_operand:DI 2 "reg_or_0_operand" "")
- (const_int 0)))]
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])))]
""
{
- tilegx_expand_builtin_vector_binop (gen_insn_mnz_<mode>, <MODE>mode,
- operands[0], <MODE>mode, operands[1],
+ tilegx_expand_builtin_vector_binop (gen_insn_mnz_v8qi, V8QImode,
+ operands[0], V8QImode, operands[1],
operands[2], true);
DONE;
})
-(define_insn "insn_mz_<mode>"
- [(set (match_operand:VEC48MODE 0 "register_operand" "=r")
- (if_then_else:VEC48MODE
- (ne:VEC48MODE
- (match_operand:VEC48MODE 1 "reg_or_0_operand" "rO")
- (const_int 0))
- (const_int 0)
- (match_operand:VEC48MODE 2 "reg_or_0_operand" "rO")))]
+(define_insn "insn_mz_v8qi"
+ [(set (match_operand:V8QI 0 "register_operand" "=r")
+ (if_then_else:V8QI
+ (ne:V8QI
+ (match_operand:V8QI 1 "reg_or_0_operand" "rO")
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)]))
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])
+ (match_operand:V8QI 2 "reg_or_0_operand" "rO")))]
+ ""
+ "v1mz\t%0, %r1, %r2"
+ [(set_attr "type" "X01")])
+
+(define_expand "insn_v1mz"
+ [(set (match_operand:DI 0 "register_operand" "")
+ (if_then_else:V8QI
+ (ne:V8QI
+ (match_operand:DI 1 "reg_or_0_operand" "")
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)]))
+ (const_vector:V8QI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])
+ (match_operand:DI 2 "reg_or_0_operand" "")))]
""
- "v<n>mz\t%0, %r1, %r2"
+{
+ tilegx_expand_builtin_vector_binop (gen_insn_mz_v8qi, V8QImode,
+ operands[0], V8QImode, operands[1],
+ operands[2], true);
+ DONE;
+})
+
+(define_insn "insn_mnz_v4hi"
+ [(set (match_operand:V4HI 0 "register_operand" "=r")
+ (if_then_else:V4HI
+ (ne:V4HI
+ (match_operand:V4HI 1 "reg_or_0_operand" "rO")
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)]))
+ (match_operand:V4HI 2 "reg_or_0_operand" "rO")
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])))]
+ ""
+ "v2mnz\t%0, %r1, %r2"
+ [(set_attr "type" "X01")])
+
+(define_expand "insn_v2mnz"
+ [(set (match_operand:DI 0 "register_operand" "")
+ (if_then_else:V4HI
+ (ne:V4HI
+ (match_operand:DI 1 "reg_or_0_operand" "")
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)]))
+ (match_operand:DI 2 "reg_or_0_operand" "")
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])))]
+ ""
+{
+ tilegx_expand_builtin_vector_binop (gen_insn_mnz_v4hi, V4HImode,
+ operands[0], V4HImode, operands[1],
+ operands[2], true);
+ DONE;
+})
+
+(define_insn "insn_mz_v4hi"
+ [(set (match_operand:V4HI 0 "register_operand" "=r")
+ (if_then_else:V4HI
+ (ne:V4HI
+ (match_operand:V4HI 1 "reg_or_0_operand" "rO")
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)]))
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])
+ (match_operand:V4HI 2 "reg_or_0_operand" "rO")))]
+ ""
+ "v2mz\t%0, %r1, %r2"
[(set_attr "type" "X01")])
-(define_expand "insn_v<n>mz"
+
+(define_expand "insn_v2mz"
[(set (match_operand:DI 0 "register_operand" "")
- (if_then_else:VEC48MODE
- (ne:VEC48MODE
+ (if_then_else:V4HI
+ (ne:V4HI
(match_operand:DI 1 "reg_or_0_operand" "")
- (const_int 0))
- (const_int 0)
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)]))
+ (const_vector:V4HI [(const_int 0) (const_int 0)
+ (const_int 0) (const_int 0)])
(match_operand:DI 2 "reg_or_0_operand" "")))]
""
{
- tilegx_expand_builtin_vector_binop (gen_insn_mz_<mode>, <MODE>mode,
- operands[0], <MODE>mode, operands[1],
+ tilegx_expand_builtin_vector_binop (gen_insn_mz_v4hi, V4HImode,
+ operands[0], V4HImode, operands[1],
operands[2], true);
DONE;
})
@@ -4409,8 +4508,8 @@
(define_expand "insn_v1mulu"
[(match_operand:DI 0 "register_operand" "")
- (match_operand:DI 1 "reg_or_0_operand" "")
- (match_operand:DI 2 "reg_or_0_operand" "")]
+ (match_operand:DI 1 "register_operand" "")
+ (match_operand:DI 2 "register_operand" "")]
""
{
tilegx_expand_builtin_vector_binop (gen_vec_widen_umult_lo_v8qi, V4HImode,
@@ -4439,8 +4538,8 @@
(define_expand "insn_v1mulus"
[(match_operand:DI 0 "register_operand" "")
- (match_operand:DI 1 "reg_or_0_operand" "")
- (match_operand:DI 2 "reg_or_0_operand" "")]
+ (match_operand:DI 1 "register_operand" "")
+ (match_operand:DI 2 "register_operand" "")]
""
{
tilegx_expand_builtin_vector_binop (gen_vec_widen_usmult_lo_v8qi, V4HImode,
@@ -4467,8 +4566,8 @@
(define_expand "insn_v2muls"
[(match_operand:DI 0 "register_operand" "")
- (match_operand:DI 1 "reg_or_0_operand" "")
- (match_operand:DI 2 "reg_or_0_operand" "")]
+ (match_operand:DI 1 "register_operand" "")
+ (match_operand:DI 2 "register_operand" "")]
""
{
tilegx_expand_builtin_vector_binop (gen_vec_widen_smult_lo_v4qi, V2SImode,
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index 7cdb555a53e..c2507c2aea8 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -4340,10 +4340,7 @@ tilepro_reorg (void)
int
tilepro_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
{
- if (flag_pic)
- return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4;
- else
- return DW_EH_PE_absptr;
+ return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4;
}
diff --git a/gcc/config/tilepro/tilepro.h b/gcc/config/tilepro/tilepro.h
index 930612d1fb4..88a0826f160 100644
--- a/gcc/config/tilepro/tilepro.h
+++ b/gcc/config/tilepro/tilepro.h
@@ -268,6 +268,8 @@ enum reg_class
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
((OFFSET) = tilepro_initial_elimination_offset((FROM),(TO)))
+#define PROFILE_BEFORE_PROLOGUE 1
+
#define FUNCTION_PROFILER(FILE, LABELNO) \
tilepro_function_profiler (FILE, LABELNO)
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 4f342c5e33c..b22536262b6 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,41 @@
+2013-03-23 Jason Merrill <jason@redhat.com>
+
+ PR c++/54277
+ * semantics.c (lambda_capture_field_type): Don't build a
+ magic decltype for pointer types.
+ (lambda_proxy_type): Likewise.
+ (finish_non_static_data_member): Get the quals from
+ the object.
+
+2013-03-20 Jason Merrill <jason@redhat.com>
+
+ PR c++/56646
+ * parser.c (cp_parser_late_return_type_opt): Save and restore
+ current_class_ptr/ref.
+
+2013-03-14 Jason Merrill <jason@redhat.com>
+
+ PR c++/56614
+ * decl.c (local_variable_p_walkfn): Check DECL_ARTIFICIAL again.
+
+2013-03-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/56403
+ * init.c (build_zero_init_1): Use RECORD_OR_UNION_CODE_P instead
+ of CLASS_TYPE_P.
+
+2013-03-09 Paolo Carlini <paolo.carlini@oracle.com>
+
+ PR c++/56534
+ * parser.c (cp_parser_elaborated_type_specifier): Don't call
+ check_elaborated_type_specifier when TREE_CODE (decl) != TYPE_DECL.
+ * decl.c (check_elaborated_type_specifier): Tidy.
+
+2013-03-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/56543
+ * tree.c (strip_typedefs): Don't copy args if they are NULL.
+
2013-02-22 Jason Merrill <jason@redhat.com>
PR c++/40405
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index f200483afef..db0c233b8e1 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -10536,9 +10536,8 @@ static tree
local_variable_p_walkfn (tree *tp, int *walk_subtrees,
void *data ATTRIBUTE_UNUSED)
{
- /* Check DECL_NAME to avoid including temporaries. We don't check
- DECL_ARTIFICIAL because we do want to complain about 'this'. */
- if (local_variable_p (*tp) && DECL_NAME (*tp))
+ if (local_variable_p (*tp)
+ && (!DECL_ARTIFICIAL (*tp) || DECL_NAME (*tp) == this_identifier))
return *tp;
else if (TYPE_P (*tp))
*walk_subtrees = 0;
@@ -11461,9 +11460,6 @@ check_elaborated_type_specifier (enum tag_types tag_code,
{
tree type;
- if (decl == error_mark_node)
- return error_mark_node;
-
/* In the case of:
struct S { struct S *p; };
diff --git a/gcc/cp/init.c b/gcc/cp/init.c
index afd082c24bc..bb0e618fbee 100644
--- a/gcc/cp/init.c
+++ b/gcc/cp/init.c
@@ -182,7 +182,7 @@ build_zero_init_1 (tree type, tree nelts, bool static_storage_p,
init = convert (type, nullptr_node);
else if (SCALAR_TYPE_P (type))
init = convert (type, integer_zero_node);
- else if (CLASS_TYPE_P (type))
+ else if (RECORD_OR_UNION_CODE_P (TREE_CODE (type)))
{
tree field;
VEC(constructor_elt,gc) *v = NULL;
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index fa82cf2c823..f875b66ffa4 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -14035,12 +14035,14 @@ cp_parser_elaborated_type_specifier (cp_parser* parser,
typename_type,
/*complain=*/tf_error);
/* If the `typename' keyword is in effect and DECL is not a type
- decl. Then type is non existant. */
+ decl, then type is non existent. */
else if (tag_type == typename_type && TREE_CODE (decl) != TYPE_DECL)
- type = NULL_TREE;
- else
- type = check_elaborated_type_specifier (tag_type, decl,
+ ;
+ else if (TREE_CODE (decl) == TYPE_DECL)
+ type = check_elaborated_type_specifier (tag_type, decl,
/*allow_template_p=*/true);
+ else if (decl == error_mark_node)
+ type = error_mark_node;
}
if (!type)
@@ -16697,17 +16699,21 @@ cp_parser_late_return_type_opt (cp_parser* parser, cp_cv_quals quals)
/* Consume the ->. */
cp_lexer_consume_token (parser->lexer);
+ tree save_ccp = current_class_ptr;
+ tree save_ccr = current_class_ref;
if (quals >= 0)
{
/* DR 1207: 'this' is in scope in the trailing return type. */
- gcc_assert (current_class_ptr == NULL_TREE);
inject_this_parameter (current_class_type, quals);
}
type = cp_parser_trailing_type_id (parser);
if (quals >= 0)
- current_class_ptr = current_class_ref = NULL_TREE;
+ {
+ current_class_ptr = save_ccp;
+ current_class_ref = save_ccr;
+ }
return type;
}
diff --git a/gcc/cp/semantics.c b/gcc/cp/semantics.c
index 0ad32a08518..8735c8c799d 100644
--- a/gcc/cp/semantics.c
+++ b/gcc/cp/semantics.c
@@ -1570,9 +1570,7 @@ finish_non_static_data_member (tree decl, tree object, tree qualifying_scope)
else
{
/* Set the cv qualifiers. */
- int quals = (current_class_ref
- ? cp_type_quals (TREE_TYPE (current_class_ref))
- : TYPE_UNQUALIFIED);
+ int quals = cp_type_quals (TREE_TYPE (object));
if (DECL_MUTABLE_P (decl))
quals &= ~TYPE_QUAL_CONST;
@@ -8815,7 +8813,8 @@ tree
lambda_capture_field_type (tree expr)
{
tree type;
- if (type_dependent_expression_p (expr))
+ if (type_dependent_expression_p (expr)
+ && !(TREE_TYPE (expr) && TREE_CODE (TREE_TYPE (expr)) == POINTER_TYPE))
{
type = cxx_make_type (DECLTYPE_TYPE);
DECLTYPE_TYPE_EXPR (type) = expr;
@@ -9020,7 +9019,8 @@ lambda_proxy_type (tree ref)
if (REFERENCE_REF_P (ref))
ref = TREE_OPERAND (ref, 0);
type = TREE_TYPE (ref);
- if (!dependent_type_p (type))
+ if (!dependent_type_p (type)
+ || (type && TREE_CODE (type) == POINTER_TYPE))
return type;
type = cxx_make_type (DECLTYPE_TYPE);
DECLTYPE_TYPE_EXPR (type) = ref;
diff --git a/gcc/cp/tree.c b/gcc/cp/tree.c
index 8909c72bb8c..b4a538645da 100644
--- a/gcc/cp/tree.c
+++ b/gcc/cp/tree.c
@@ -1209,7 +1209,8 @@ strip_typedefs (tree t)
case TYPENAME_TYPE:
{
tree fullname = TYPENAME_TYPE_FULLNAME (t);
- if (TREE_CODE (fullname) == TEMPLATE_ID_EXPR)
+ if (TREE_CODE (fullname) == TEMPLATE_ID_EXPR
+ && TREE_OPERAND (fullname, 1))
{
tree args = TREE_OPERAND (fullname, 1);
tree new_args = copy_node (args);
diff --git a/gcc/doc/cppopts.texi b/gcc/doc/cppopts.texi
index 205d8708833..a1b66a29ad4 100644
--- a/gcc/doc/cppopts.texi
+++ b/gcc/doc/cppopts.texi
@@ -803,7 +803,7 @@ Replacement: [ ] @{ @} # \ ^ | ~
Enable special code to work around file systems which only permit very
short file names, such as MS-DOS@.
-@itemx --help
+@item --help
@itemx --target-help
@opindex help
@opindex target-help
diff --git a/gcc/doc/generic.texi b/gcc/doc/generic.texi
index 31e8855bf84..261ea236ed2 100644
--- a/gcc/doc/generic.texi
+++ b/gcc/doc/generic.texi
@@ -1415,13 +1415,13 @@ generate these expressions anyhow, if it can tell that strictness does
not matter. The type of the operands and that of the result are
always of @code{BOOLEAN_TYPE} or @code{INTEGER_TYPE}.
-@itemx POINTER_PLUS_EXPR
+@item POINTER_PLUS_EXPR
This node represents pointer arithmetic. The first operand is always
a pointer/reference type. The second operand is always an unsigned
integer type compatible with sizetype. This is the only binary
arithmetic operand that can operate on pointer types.
-@itemx PLUS_EXPR
+@item PLUS_EXPR
@itemx MINUS_EXPR
@itemx MULT_EXPR
These nodes represent various binary arithmetic operations.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index f7ca1b2f0e5..48788c9b88b 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -915,7 +915,6 @@ See RS/6000 and PowerPC Options.
-mfaster-structs -mno-faster-structs -mflat -mno-flat @gol
-mfpu -mno-fpu -mhard-float -msoft-float @gol
-mhard-quad-float -msoft-quad-float @gol
--mlittle-endian @gol
-mstack-bias -mno-stack-bias @gol
-munaligned-doubles -mno-unaligned-doubles @gol
-mv8plus -mno-v8plus -mvis -mno-vis @gol
@@ -5191,7 +5190,7 @@ thus dbg_cnt() returns true always unless the upper bound is set by this option.
e.g. With -fdbg-cnt=dce:10,tail_call:0
dbg_cnt(dce) will return true only for first 10 invocations
-@itemx -fenable-@var{kind}-@var{pass}
+@item -fenable-@var{kind}-@var{pass}
@itemx -fdisable-@var{kind}-@var{pass}=@var{range-list}
@opindex fdisable-
@opindex fenable-
@@ -5339,11 +5338,11 @@ Dump after duplicating the computed gotos.
@option{-fdump-rtl-ce3} enable dumping after the three
if conversion passes.
-@itemx -fdump-rtl-cprop_hardreg
+@item -fdump-rtl-cprop_hardreg
@opindex fdump-rtl-cprop_hardreg
Dump after hard register copy propagation.
-@itemx -fdump-rtl-csa
+@item -fdump-rtl-csa
@opindex fdump-rtl-csa
Dump after combining stack adjustments.
@@ -5354,11 +5353,11 @@ Dump after combining stack adjustments.
@option{-fdump-rtl-cse1} and @option{-fdump-rtl-cse2} enable dumping after
the two common sub-expression elimination passes.
-@itemx -fdump-rtl-dce
+@item -fdump-rtl-dce
@opindex fdump-rtl-dce
Dump after the standalone dead code elimination passes.
-@itemx -fdump-rtl-dbr
+@item -fdump-rtl-dbr
@opindex fdump-rtl-dbr
Dump after delayed branch scheduling.
@@ -5403,7 +5402,7 @@ Dump after the initialization of the registers.
@opindex fdump-rtl-initvals
Dump after the computation of the initial value sets.
-@itemx -fdump-rtl-into_cfglayout
+@item -fdump-rtl-into_cfglayout
@opindex fdump-rtl-into_cfglayout
Dump after converting to cfglayout mode.
@@ -5433,7 +5432,7 @@ Dump after removing redundant mode switches.
@opindex fdump-rtl-rnreg
Dump after register renumbering.
-@itemx -fdump-rtl-outof_cfglayout
+@item -fdump-rtl-outof_cfglayout
@opindex fdump-rtl-outof_cfglayout
Dump after converting from cfglayout mode.
@@ -18226,43 +18225,94 @@ Set the cost to assume for a multiply insn.
@item -mdiv=@var{strategy}
@opindex mdiv=@var{strategy}
-Set the division strategy to use for SHmedia code. @var{strategy} must be
-one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
-inv:call2, inv:fp .
-"fp" performs the operation in floating point. This has a very high latency,
+Set the division strategy to be used for integer division operations.
+For SHmedia @var{strategy} can be one of:
+
+@table @samp
+
+@item fp
+Performs the operation in floating point. This has a very high latency,
but needs only a few instructions, so it might be a good choice if
your code has enough easily-exploitable ILP to allow the compiler to
schedule the floating-point instructions together with other instructions.
Division by zero causes a floating-point exception.
-"inv" uses integer operations to calculate the inverse of the divisor,
+
+@item inv
+Uses integer operations to calculate the inverse of the divisor,
and then multiplies the dividend with the inverse. This strategy allows
-cse and hoisting of the inverse calculation. Division by zero calculates
+CSE and hoisting of the inverse calculation. Division by zero calculates
an unspecified result, but does not trap.
-"inv:minlat" is a variant of "inv" where if no cse / hoisting opportunities
+
+@item inv:minlat
+A variant of @samp{inv} where, if no CSE or hoisting opportunities
have been found, or if the entire operation has been hoisted to the same
place, the last stages of the inverse calculation are intertwined with the
final multiply to reduce the overall latency, at the expense of using a few
more instructions, and thus offering fewer scheduling opportunities with
other code.
-"call" calls a library function that usually implements the inv:minlat
+
+@item call
+Calls a library function that usually implements the @samp{inv:minlat}
strategy.
-This gives high code density for m5-*media-nofpu compilations.
-"call2" uses a different entry point of the same library function, where it
+This gives high code density for @code{m5-*media-nofpu} compilations.
+
+@item call2
+Uses a different entry point of the same library function, where it
assumes that a pointer to a lookup table has already been set up, which
-exposes the pointer load to cse / code hoisting optimizations.
-"inv:call", "inv:call2" and "inv:fp" all use the "inv" algorithm for initial
-code generation, but if the code stays unoptimized, revert to the "call",
-"call2", or "fp" strategies, respectively. Note that the
+exposes the pointer load to CSE and code hoisting optimizations.
+
+@item inv:call
+@itemx inv:call2
+@itemx inv:fp
+Use the @samp{inv} algorithm for initial
+code generation, but if the code stays unoptimized, revert to the @samp{call},
+@samp{call2}, or @samp{fp} strategies, respectively. Note that the
potentially-trapping side effect of division by zero is carried by a
separate instruction, so it is possible that all the integer instructions
are hoisted out, but the marker for the side effect stays where it is.
-A recombination to fp operations or a call is not possible in that case.
-"inv20u" and "inv20l" are variants of the "inv:minlat" strategy. In the case
-that the inverse calculation was nor separated from the multiply, they speed
-up division where the dividend fits into 20 bits (plus sign where applicable),
+A recombination to floating-point operations or a call is not possible
+in that case.
+
+@item inv20u
+@itemx inv20l
+Variants of the @samp{inv:minlat} strategy. In the case
+that the inverse calculation is not separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable)
by inserting a test to skip a number of operations in this case; this test
-slows down the case of larger dividends. inv20u assumes the case of a such
-a small dividend to be unlikely, and inv20l assumes it to be likely.
+slows down the case of larger dividends. @samp{inv20u} assumes the case of a such
+a small dividend to be unlikely, and @samp{inv20l} assumes it to be likely.
+
+@end table
+
+For targets other than SHmedia @var{strategy} can be one of:
+
+@table @samp
+
+@item call-div1
+Calls a library function that uses the single-step division instruction
+@code{div1} to perform the operation. Division by zero calculates an
+unspecified result and does not trap. This is the default except for SH4,
+SH2A and SHcompact.
+
+@item call-fp
+Calls a library function that performs the operation in double precision
+floating point. Division by zero causes a floating-point exception. This is
+the default for SHcompact with FPU. Specifying this for targets that do not
+have a double precision FPU will default to @code{call-div1}.
+
+@item call-table
+Calls a library function that uses a lookup table for small divisors and
+the @code{div1} instruction with case distinction for larger divisors. Division
+by zero calculates an unspecified result and does not trap. This is the default
+for SH4. Specifying this for targets that do not have dynamic shift
+instructions will default to @code{call-div1}.
+
+@end table
+
+When a division strategy has not been specified the default strategy will be
+selected based on the current target. For SH2A the default strategy is to
+use the @code{divs} and @code{divu} instructions instead of library function
+calls.
@item -maccumulate-outgoing-args
@opindex maccumulate-outgoing-args
@@ -18662,11 +18712,6 @@ These @samp{-m} options are supported in addition to the above
on SPARC-V9 processors in 64-bit environments:
@table @gcctabopt
-@item -mlittle-endian
-@opindex mlittle-endian
-Generate code for a processor running in little-endian mode. It is only
-available for a few configurations and most notably not on Solaris and Linux.
-
@item -m32
@itemx -m64
@opindex m32
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index c2a7a8b8ff0..88377f547c5 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,23 @@
+2013-03-15 Tobias Burnus <burnus@net-b.de>
+
+ PR fortran/56615
+ * trans-intrinsic.c (gfc_conv_intrinsic_transfer): Pack arrays
+ if they are not simply contiguous.
+
+2013-03-13 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/56575
+ * expr.c (gfc_default_initializer): Check that a class declared
+ type has any components.
+ * resolve.c (resolve_fl_derived0): On failing the test for C437
+ set the type to BT_UNKNOWN to prevent repeat error messages.
+
+2013-03-10 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/55362
+ * check.c (array_check): It is an error if a procedure is
+ passed.
+
2013-02-22 Janus Weil <janus@gcc.gnu.org>
PR fortran/56385
diff --git a/gcc/fortran/check.c b/gcc/fortran/check.c
index 32e54635005..d69ba886373 100644
--- a/gcc/fortran/check.c
+++ b/gcc/fortran/check.c
@@ -256,7 +256,7 @@ array_check (gfc_expr *e, int n)
return SUCCESS;
}
- if (e->rank != 0)
+ if (e->rank != 0 && e->ts.type != BT_PROCEDURE)
return SUCCESS;
gfc_error ("'%s' argument of '%s' intrinsic at %L must be an array",
diff --git a/gcc/fortran/expr.c b/gcc/fortran/expr.c
index 8e52c472bad..0ad7f7b5b9e 100644
--- a/gcc/fortran/expr.c
+++ b/gcc/fortran/expr.c
@@ -3759,7 +3759,8 @@ gfc_default_initializer (gfc_typespec *ts)
types (otherwise we could use gfc_has_default_initializer()). */
for (comp = ts->u.derived->components; comp; comp = comp->next)
if (comp->initializer || comp->attr.allocatable
- || (comp->ts.type == BT_CLASS && CLASS_DATA (comp)->attr.allocatable))
+ || (comp->ts.type == BT_CLASS && CLASS_DATA (comp)
+ && CLASS_DATA (comp)->attr.allocatable))
break;
if (!comp)
diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 17efdb5b373..8729e1567be 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -11967,6 +11967,8 @@ resolve_fl_derived0 (gfc_symbol *sym)
{
gfc_error ("Component '%s' with CLASS at %L must be allocatable "
"or pointer", c->name, &c->loc);
+ /* Prevent a recurrence of the error. */
+ c->ts.type = BT_UNKNOWN;
return FAILURE;
}
diff --git a/gcc/fortran/trans-intrinsic.c b/gcc/fortran/trans-intrinsic.c
index b351824b6d3..ed0ab8b2ed9 100644
--- a/gcc/fortran/trans-intrinsic.c
+++ b/gcc/fortran/trans-intrinsic.c
@@ -5412,9 +5412,8 @@ gfc_conv_intrinsic_transfer (gfc_se * se, gfc_expr * expr)
source = gfc_conv_descriptor_data_get (argse.expr);
source_type = gfc_get_element_type (TREE_TYPE (argse.expr));
- /* Repack the source if not a full variable array. */
- if (arg->expr->expr_type == EXPR_VARIABLE
- && arg->expr->ref->u.ar.type != AR_FULL)
+ /* Repack the source if not simply contiguous. */
+ if (!gfc_is_simply_contiguous (arg->expr, false))
{
tmp = gfc_build_addr_expr (NULL_TREE, argse.expr);
diff --git a/gcc/gcc.c b/gcc/gcc.c
index 29d26cd6144..939dcc8735f 100644
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
@@ -267,6 +267,7 @@ static const char *compare_debug_dump_opt_spec_function (int, const char **);
static const char *compare_debug_self_opt_spec_function (int, const char **);
static const char *compare_debug_auxbase_opt_spec_function (int, const char **);
static const char *pass_through_libs_spec_func (int, const char **);
+static char *convert_white_space (char *);
/* The Specs Language
@@ -6506,6 +6507,7 @@ main (int argc, char **argv)
X_OK, false);
if (lto_wrapper_file)
{
+ lto_wrapper_file = convert_white_space (lto_wrapper_file);
lto_wrapper_spec = lto_wrapper_file;
obstack_init (&collect_obstack);
obstack_grow (&collect_obstack, "COLLECT_LTO_WRAPPER=",
@@ -6916,12 +6918,13 @@ warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\n\n"
+ strlen (fuse_linker_plugin), 0))
#endif
{
- linker_plugin_file_spec = find_a_file (&exec_prefixes,
- LTOPLUGINSONAME, R_OK,
- false);
- if (!linker_plugin_file_spec)
+ char *temp_spec = find_a_file (&exec_prefixes,
+ LTOPLUGINSONAME, R_OK,
+ false);
+ if (!temp_spec)
fatal_error ("-fuse-linker-plugin, but %s not found",
LTOPLUGINSONAME);
+ linker_plugin_file_spec = convert_white_space (temp_spec);
}
#endif
lto_gcc_spec = argv[0];
@@ -8376,3 +8379,51 @@ pass_through_libs_spec_func (int argc, const char **argv)
}
return prepended;
}
+
+/* Insert backslash before spaces in ORIG (usually a file path), to
+ avoid being broken by spec parser.
+
+ This function is needed as do_spec_1 treats white space (' ' and '\t')
+ as the end of an argument. But in case of -plugin /usr/gcc install/xxx.so,
+ the file name should be treated as a single argument rather than being
+ broken into multiple. Solution is to insert '\\' before the space in a
+ file name.
+
+ This function converts and only converts all occurrence of ' '
+ to '\\' + ' ' and '\t' to '\\' + '\t'. For example:
+ "a b" -> "a\\ b"
+ "a b" -> "a\\ \\ b"
+ "a\tb" -> "a\\\tb"
+ "a\\ b" -> "a\\\\ b"
+
+ orig: input null-terminating string that was allocated by xalloc. The
+ memory it points to might be freed in this function. Behavior undefined
+ if ORIG wasn't xalloced or was freed already at entry.
+
+ Return: ORIG if no conversion needed. Otherwise a newly allocated string
+ that was converted from ORIG. */
+
+static char *
+convert_white_space (char *orig)
+{
+ int len, number_of_space = 0;
+
+ for (len = 0; orig[len]; len++)
+ if (orig[len] == ' ' || orig[len] == '\t') number_of_space++;
+
+ if (number_of_space)
+ {
+ char *new_spec = (char *) xmalloc (len + number_of_space + 1);
+ int j, k;
+ for (j = 0, k = 0; j <= len; j++, k++)
+ {
+ if (orig[j] == ' ' || orig[j] == '\t')
+ new_spec[k++] = '\\';
+ new_spec[k] = orig[j];
+ }
+ free (orig);
+ return new_spec;
+ }
+ else
+ return orig;
+}
diff --git a/gcc/gimple-low.c b/gcc/gimple-low.c
index c3d41282e80..293d4d7b82b 100644
--- a/gcc/gimple-low.c
+++ b/gcc/gimple-low.c
@@ -241,15 +241,17 @@ gimple_check_call_args (gimple stmt, tree fndecl)
i < nargs;
i++, p = DECL_CHAIN (p))
{
+ tree arg;
/* We cannot distinguish a varargs function from the case
of excess parameters, still deferring the inlining decision
to the callee is possible. */
if (!p)
break;
+ arg = gimple_call_arg (stmt, i);
if (p == error_mark_node
- || gimple_call_arg (stmt, i) == error_mark_node
- || !fold_convertible_p (DECL_ARG_TYPE (p),
- gimple_call_arg (stmt, i)))
+ || arg == error_mark_node
+ || (!types_compatible_p (DECL_ARG_TYPE (p), TREE_TYPE (arg))
+ && !fold_convertible_p (DECL_ARG_TYPE (p), arg)))
return false;
}
}
@@ -257,15 +259,17 @@ gimple_check_call_args (gimple stmt, tree fndecl)
{
for (i = 0, p = parms; i < nargs; i++, p = TREE_CHAIN (p))
{
+ tree arg;
/* If this is a varargs function defer inlining decision
to callee. */
if (!p)
break;
+ arg = gimple_call_arg (stmt, i);
if (TREE_VALUE (p) == error_mark_node
- || gimple_call_arg (stmt, i) == error_mark_node
+ || arg == error_mark_node
|| TREE_CODE (TREE_VALUE (p)) == VOID_TYPE
- || !fold_convertible_p (TREE_VALUE (p),
- gimple_call_arg (stmt, i)))
+ || (!types_compatible_p (TREE_VALUE (p), TREE_TYPE (arg))
+ && !fold_convertible_p (TREE_VALUE (p), arg)))
return false;
}
}
diff --git a/gcc/godump.c b/gcc/godump.c
index ab1edc620f9..b5455253b61 100644
--- a/gcc/godump.c
+++ b/gcc/godump.c
@@ -1,5 +1,5 @@
/* Output Go language descriptions of types.
- Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
+ Copyright (C) 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
Written by Ian Lance Taylor <iant@google.com>.
This file is part of GCC.
@@ -1164,9 +1164,11 @@ find_dummy_types (const void *ptr, void *adata)
struct godump_container *data = (struct godump_container *) adata;
const char *type = (const char *) ptr;
void **slot;
+ void **islot;
slot = htab_find_slot (data->type_hash, type, NO_INSERT);
- if (slot == NULL)
+ islot = htab_find_slot (data->invalid_hash, type, NO_INSERT);
+ if (slot == NULL || islot != NULL)
fprintf (go_dump_file, "type _%s struct {}\n", type);
return true;
}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a9f84c41def..099241559a5 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,77 @@
+2013-03-26 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2013-03-13 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/56608
+ * gcc.dg/vect/fast-math-bb-slp-call-3.c: New testcase.
+
+ 2013-03-05 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/56270
+ * gcc.dg/vect/slp-38.c: New testcase.
+
+2013-03-25 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline:
+ 2013-03-13 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/49880
+ * gcc.target/sh/pr49880-1.c: New.
+ * gcc.target/sh/pr49880-2.c: New.
+ * gcc.target/sh/pr49880-3.c: New.
+ * gcc.target/sh/pr49880-4.c: New.
+ * gcc.target/sh/pr49880-5.c: New.
+
+2013-03-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/56560
+ * gcc.target/i386/pr56560.c: New file.
+
+2013-03-15 Tobias Burnus <burnus@net-b.de>
+
+ PR fortran/56615
+ * gfortran.dg/transfer_intrinsic_5.f90: New.
+
+2013-03-14 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/56403
+ * g++.dg/torture/pr56403.C: New test.
+
+2013-03-13 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/56575
+ * gfortran.dg/class_56.f90: New test.
+
+2013-03-10 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/55362
+ * gfortran.dg/intrinsic_size_4.f90 : New test.
+
+2013-03-09 Paolo Carlini <paolo.carlini@oracle.com>
+
+ PR c++/56534
+ * g++.dg/template/crash115.C: New.
+
+2013-03-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/56543
+ * g++.dg/template/typename20.C: New test.
+
+2013-03-01 Richard Biener <rguenther@suse.de>
+
+ Backport from mainline
+ 2012-12-12 Zdenek Dvorak <ook@ucw.cz>
+
+ PR tree-optimization/55481
+ * gcc.dg/torture/pr55481.c: New testcase.
+ * gcc.dg/torture/pr56488.c: Likewise.
+
+2013-02-26 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/56443
+ * gcc.dg/torture/pr56443.c: New test.
+
2013-02-22 Janus Weil <janus@gcc.gnu.org>
PR fortran/56385
diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-defarg1.C b/gcc/testsuite/g++.dg/cpp0x/initlist-defarg1.C
new file mode 100644
index 00000000000..45eb2d5e1f0
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/initlist-defarg1.C
@@ -0,0 +1,36 @@
+// PR c++/56614
+// { dg-require-effective-target c++11 }
+
+#include <initializer_list>
+
+namespace std
+{
+ template<typename T>
+ struct allocator
+ { };
+
+ template<typename T, typename Alloc = std::allocator<T> >
+ struct vector
+ {
+ vector(std::initializer_list<T>, const Alloc& = Alloc()) { }
+ };
+}
+
+void func() { }
+
+enum E { ee };
+
+struct C
+{
+ template<typename T>
+ C(T, std::vector<E> = std::vector<E>({ ee }))
+ { }
+};
+
+struct G
+{
+ void gen()
+ {
+ C c(&func);
+ }
+};
diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this9.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this9.C
new file mode 100644
index 00000000000..07ddd0863de
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-this9.C
@@ -0,0 +1,19 @@
+// PR c++/54277
+// { dg-do compile { target c++11 } }
+
+struct Used
+{
+ void foo() { }
+};
+
+template <typename>
+struct S
+{
+ Used x;
+
+ void bar()
+ {
+ auto f = [this] { x.foo(); };
+ f();
+ }
+};
diff --git a/gcc/testsuite/g++.dg/cpp0x/trailing9.C b/gcc/testsuite/g++.dg/cpp0x/trailing9.C
new file mode 100644
index 00000000000..d7895b38e3e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/trailing9.C
@@ -0,0 +1,12 @@
+// PR c++/56646
+// { dg-require-effective-target c++11 }
+
+struct A {
+ void f();
+};
+
+void A::f() {
+ struct B {
+ auto g() -> void { }
+ };
+}
diff --git a/gcc/testsuite/g++.dg/template/crash115.C b/gcc/testsuite/g++.dg/template/crash115.C
new file mode 100644
index 00000000000..5c9f525cd64
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/crash115.C
@@ -0,0 +1,3 @@
+// PR c++/56534
+
+template < struct template rebind < > // { dg-error "expected" }
diff --git a/gcc/testsuite/g++.dg/template/typename20.C b/gcc/testsuite/g++.dg/template/typename20.C
new file mode 100644
index 00000000000..d5bd51f356d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/typename20.C
@@ -0,0 +1,11 @@
+// PR c++/56543
+
+template <typename>
+struct S;
+
+template <typename T>
+struct U
+{
+ typedef typename S <T>::template V <> W;
+ S <W> x;
+};
diff --git a/gcc/testsuite/g++.dg/torture/pr56403.C b/gcc/testsuite/g++.dg/torture/pr56403.C
new file mode 100644
index 00000000000..27b6eeb8888
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr56403.C
@@ -0,0 +1,12 @@
+// PR c++/56403
+// { dg-do compile }
+
+#include <stdarg.h>
+
+struct S { va_list err_args; };
+
+void *
+foo ()
+{
+ return new S ();
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr55481.c b/gcc/testsuite/gcc.dg/torture/pr55481.c
new file mode 100644
index 00000000000..26ba9ff7d99
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr55481.c
@@ -0,0 +1,16 @@
+/* { dg-do run } */
+
+int main()
+{
+ signed char result = 0;
+ int n;
+ for (n = 0; n < 13; ++n)
+ {
+ int tem = result;
+ tem = tem + 31;
+ result = tem;
+ }
+ if (result != -109)
+ __builtin_abort ();
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr56443.c b/gcc/testsuite/gcc.dg/torture/pr56443.c
new file mode 100644
index 00000000000..ed60e05afd0
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr56443.c
@@ -0,0 +1,29 @@
+/* PR tree-optimization/56443 */
+/* { dg-do run } */
+/* { dg-options "-ftree-vectorize" } */
+
+extern void abort (void);
+typedef int myint __attribute__ ((__aligned__ (16)));
+
+int a1[1024] __attribute__ ((__aligned__ (16)));
+int a2[1024] __attribute__ ((__aligned__ (16)));
+
+__attribute__((noinline, noclone)) void
+test (int n, myint * __restrict__ p1, myint * __restrict__ p2)
+{
+ while (n--)
+ *p1++ = *p2++ + 1;
+}
+
+int
+main ()
+{
+ int n;
+ for (n = 0; n < 1024; n++)
+ a2[n] = n;
+ test (1024, a1, a2);
+ for (n = 0; n < 1024; n++)
+ if (a1[n] != a2[n] + 1)
+ abort ();
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr56488.c b/gcc/testsuite/gcc.dg/torture/pr56488.c
new file mode 100644
index 00000000000..78bac7bede7
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr56488.c
@@ -0,0 +1,31 @@
+/* { dg-do run } */
+
+int a, c, d = 1;
+struct S { int s; } b, f;
+short e;
+
+static void
+foo (int x)
+{
+ int g[] = { };
+ for (e = 0; e != 1; e = e + 5)
+ {
+ int *h[1] = { &g[0] };
+ if (!x)
+ return;
+ f = b;
+ }
+}
+
+int
+main ()
+{
+ int i, j;
+ for (i = 0; i < 6; i++)
+ for (j = 8; j; j--)
+ a = 0;
+ foo (d);
+ while (c)
+ ;
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c b/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c
new file mode 100644
index 00000000000..5878d418f50
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c
@@ -0,0 +1,68 @@
+#include <stdlib.h>
+#include <math.h>
+
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#define MAX(a, b) (((a) > (b)) ? (a) : (b))
+
+typedef struct {
+ int initialHeight, initialWidth;
+ int rotatedHeight, rotatedWidth;
+ int autoCropHeight, autoCropWidth;
+} ufraw_data;
+
+void __attribute__((noinline,noclone))
+ufraw_test(ufraw_data *uf)
+{
+ int iWidth = uf->initialWidth;
+ int iHeight = uf->initialHeight;
+ double aspectRatio = ((double)iWidth) / iHeight;
+ double midX = iWidth / 2.0 - 0.5;
+ double midY = iHeight / 2.0 - 0.5;
+ double maxX = 0, maxY = 0;
+ double minX = 999999, minY = 999999;
+ double lastX = 0, lastY = 0, area = 0;
+ double scale;
+ int i;
+ for (i = 0; i < iWidth + iHeight - 1; i++)
+ {
+ int x, y;
+ if (i < iWidth) { // Trace the left border of the image
+ x = i;
+ y = 0;
+ } else { // Trace the bottom border of the image
+ x = iWidth - 1;
+ y = i - iWidth + 1;
+ }
+ double srcX = x - midX;
+ double srcY = y - midY;
+ // A digital planimeter:
+ area += srcY * lastX - srcX * lastY;
+ lastX = srcX;
+ lastY = srcY;
+ maxX = MAX(maxX, fabs(srcX));
+ maxY = MAX(maxY, fabs(srcY));
+ if (fabs(srcX / srcY) > aspectRatio)
+ minX = MIN(minX, fabs(srcX));
+ else
+ minY = MIN(minY, fabs(srcY));
+ }
+ scale = sqrt((iWidth - 1) * (iHeight - 1) / area);
+ uf->rotatedWidth = MIN(ceil(2 * maxX + 1.0) * scale, 2 * iWidth);
+ uf->rotatedHeight = MIN(ceil(2 * maxY + 1.0) * scale, 2 * iHeight);
+ uf->autoCropWidth = MIN(floor(2 * minX) * scale, 2 * iWidth);
+ uf->autoCropHeight = MIN(floor(2 * minY) * scale, 2 * iHeight);
+ if (uf->autoCropWidth != 3)
+ abort ();
+}
+
+int main()
+{
+ ufraw_data uf_data;
+ ufraw_data *uf = &uf_data;
+ uf->initialWidth = 4;
+ uf->initialHeight = 5;
+ ufraw_test(uf);
+ return 0;
+}
+
+/* { dg-final { cleanup-tree-dump "slp" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/slp-38.c b/gcc/testsuite/gcc.dg/vect/slp-38.c
new file mode 100644
index 00000000000..a387f5d0e06
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/slp-38.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+
+typedef struct {
+ float l, h;
+} tFPinterval;
+
+tFPinterval X[1024];
+tFPinterval Y[1024];
+tFPinterval Z[1024];
+
+void Compute(void)
+{
+ int d;
+ for (d= 0; d < 1024; d++)
+ {
+ Y[d].l= X[d].l + X[d].h;
+ Y[d].h= Y[d].l;
+ Z[d].l= X[d].l;
+ Z[d].h= X[d].h;
+ }
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 1 "vect" { target { vect_float && vect_perm } } } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr56560.c b/gcc/testsuite/gcc.target/i386/pr56560.c
new file mode 100644
index 00000000000..5417cbddedb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr56560.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx -mvzeroupper -dp" } */
+
+extern void abort (void);
+
+typedef double vec_t __attribute__((vector_size(32)));
+
+struct S { int i1; int i2; int i3; };
+
+extern int bar (vec_t, int, int, int, int, int, struct S);
+
+void foo (vec_t v, struct S s)
+{
+ int i = bar (v, 1, 2, 3, 4, 5, s);
+ if (i == 0)
+ abort ();
+}
+
+/* { dg-final { scan-assembler-not "avx_vzeroupper" } } */
diff --git a/gcc/testsuite/gcc.target/sh/pr49880-1.c b/gcc/testsuite/gcc.target/sh/pr49880-1.c
new file mode 100644
index 00000000000..e19f1bf38a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr49880-1.c
@@ -0,0 +1,22 @@
+/* Check that the option -mdiv=call-div1 works. */
+/* { dg-do link { target "sh*-*-*" } } */
+/* { dg-options "-mdiv=call-div1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+
+int
+test00 (int a, int b)
+{
+ return a / b;
+}
+
+unsigned int
+test01 (unsigned int a, unsigned b)
+{
+ return a / b;
+}
+
+int
+main (int argc, char** argv)
+{
+ return test00 (argc, 123) + test01 (argc, 123);
+}
diff --git a/gcc/testsuite/gcc.target/sh/pr49880-2.c b/gcc/testsuite/gcc.target/sh/pr49880-2.c
new file mode 100644
index 00000000000..eef832e30db
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr49880-2.c
@@ -0,0 +1,22 @@
+/* Check that the option -mdiv=call-fp works. */
+/* { dg-do link { target "sh*-*-*" } } */
+/* { dg-options "-mdiv=call-fp" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+
+int
+test00 (int a, int b)
+{
+ return a / b;
+}
+
+unsigned int
+test01 (unsigned int a, unsigned b)
+{
+ return a / b;
+}
+
+int
+main (int argc, char** argv)
+{
+ return test00 (argc, 123) + test01 (argc, 123);
+}
diff --git a/gcc/testsuite/gcc.target/sh/pr49880-3.c b/gcc/testsuite/gcc.target/sh/pr49880-3.c
new file mode 100644
index 00000000000..80a7df548a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr49880-3.c
@@ -0,0 +1,22 @@
+/* Check that the option -mdiv=call-table works. */
+/* { dg-do link { target "sh*-*-*" } } */
+/* { dg-options "-mdiv=call-table" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+
+int
+test00 (int a, int b)
+{
+ return a / b;
+}
+
+unsigned int
+test01 (unsigned int a, unsigned b)
+{
+ return a / b;
+}
+
+int
+main (int argc, char** argv)
+{
+ return test00 (argc, 123) + test01 (argc, 123);
+}
diff --git a/gcc/testsuite/gcc.target/sh/pr49880-4.c b/gcc/testsuite/gcc.target/sh/pr49880-4.c
new file mode 100644
index 00000000000..998a8b69fdd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr49880-4.c
@@ -0,0 +1,19 @@
+/* Check that the option -mdiv=call-fp does not produce calls to the
+ library function that uses FPU to implement integer division if FPU insns
+ are not supported or are disabled. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-mdiv=call-fp" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*"} { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" } } */
+/* { dg-final { scan-assembler-not "sdivsi3_i4\n|udivsi3_i4\n" } } */
+
+int
+test00 (int a, int b)
+{
+ return a / b;
+}
+
+unsigned int
+test01 (unsigned int a, unsigned b)
+{
+ return a / b;
+}
diff --git a/gcc/testsuite/gcc.target/sh/pr49880-5.c b/gcc/testsuite/gcc.target/sh/pr49880-5.c
new file mode 100644
index 00000000000..09e99a85f63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/pr49880-5.c
@@ -0,0 +1,19 @@
+/* Check that the option -mdiv=call-fp results in the corresponding library
+ function calls on targets that have a double precision FPU. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-mdiv=call-fp" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*"} { "-m2a" "-m4" "-m4a" "*single-only" } } */
+/* { dg-final { scan-assembler "sdivsi3_i4\n" } } */
+/* { dg-final { scan-assembler "udivsi3_i4\n" } } */
+
+int
+test00 (int a, int b)
+{
+ return a / b;
+}
+
+unsigned int
+test01 (unsigned int a, unsigned b)
+{
+ return a / b;
+}
diff --git a/gcc/testsuite/gfortran.dg/class_56.f90 b/gcc/testsuite/gfortran.dg/class_56.f90
new file mode 100644
index 00000000000..7ec4bda4a49
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/class_56.f90
@@ -0,0 +1,21 @@
+! { dg-do compile }
+! Test fix for PR56575.
+!
+! Contributed by A Kasahara <latlon90180+gcc_bugzilla@gmail.com>
+!
+module lib_container
+ implicit none
+
+ type:: Object
+ end type Object
+
+ type:: Container
+ class(Object):: v ! { dg-error "must be allocatable or pointer" }
+ end type Container
+
+contains
+
+ subroutine proc(self)
+ class(Container), intent(inout):: self
+ end subroutine proc
+end module lib_container
diff --git a/gcc/testsuite/gfortran.dg/intrinsic_size_4.f90 b/gcc/testsuite/gfortran.dg/intrinsic_size_4.f90
new file mode 100644
index 00000000000..6d8e1c0b587
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/intrinsic_size_4.f90
@@ -0,0 +1,18 @@
+! { dg-do compile }
+! Test the fix for PR55362; the error below was missed and an ICE ensued.
+!
+! ! Contributed by Dominique d'Humieres <dominiq@lps.ens.fr>
+!
+program ice_test
+ implicit none
+ write(*,*) 'message: ', &
+ size(Error_Msg),Error_Msg() ! { dg-error "must be an array" }
+ write(*,*) 'message: ', &
+ size(Error_Msg ()),Error_Msg() ! OK of course
+contains
+ function Error_Msg() result(ErrorMsg)
+ character, dimension(:), pointer :: ErrorMsg
+ character, dimension(1), target :: str = '!'
+ ErrorMsg => str
+ end function Error_Msg
+end program ice_test
diff --git a/gcc/testsuite/gfortran.dg/transfer_intrinsic_5.f90 b/gcc/testsuite/gfortran.dg/transfer_intrinsic_5.f90
new file mode 100644
index 00000000000..47be585a78a
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/transfer_intrinsic_5.f90
@@ -0,0 +1,50 @@
+! { dg-do run }
+!
+! PR fortran/56615
+!
+! Contributed by Harald Anlauf
+!
+!
+program gfcbug
+ implicit none
+ integer, parameter :: n = 8
+ integer :: i
+ character(len=1), dimension(n) :: a, b
+ character(len=n) :: s, t
+ character(len=n/2) :: u
+
+ do i = 1, n
+ a(i) = achar (i-1 + iachar("a"))
+ end do
+! print *, "# Forward:"
+! print *, "a=", a
+ s = transfer (a, s)
+! print *, "s=", s
+ call cmp (a, s)
+! print *, " stride = +2:"
+ do i = 1, n/2
+ u(i:i) = a(2*i-1)
+ end do
+! print *, "u=", u
+ call cmp (a(1:n:2), u)
+! print *
+! print *, "# Backward:"
+ b = a(n:1:-1)
+! print *, "b=", b
+ t = transfer (b, t)
+! print *, "t=", t
+ call cmp (b, t)
+! print *, " stride = -1:"
+ call cmp (a(n:1:-1), t)
+contains
+ subroutine cmp (b, s)
+ character(len=1), dimension(:), intent(in) :: b
+ character(len=*), intent(in) :: s
+ character(len=size(b)) :: c
+ c = transfer (b, c)
+ if (c /= s) then
+ print *, "c=", c, " ", merge (" ok","BUG!", c == s)
+ call abort ()
+ end if
+ end subroutine cmp
+end program gfcbug
diff --git a/gcc/toplev.c b/gcc/toplev.c
index 6f1da41b761..6bf17368738 100644
--- a/gcc/toplev.c
+++ b/gcc/toplev.c
@@ -1605,18 +1605,6 @@ process_options (void)
if (!flag_stack_protect)
warn_stack_protect = 0;
- /* ??? Unwind info is not correct around the CFG unless either a frame
- pointer is present or A_O_A is set. Fixing this requires rewriting
- unwind info generation to be aware of the CFG and propagating states
- around edges. */
- if (flag_unwind_tables && !ACCUMULATE_OUTGOING_ARGS
- && flag_omit_frame_pointer)
- {
- warning (0, "unwind tables currently require a frame pointer "
- "for correctness");
- flag_omit_frame_pointer = 0;
- }
-
/* Enable -Werror=coverage-mismatch when -Werror and -Wno-error
have not been set. */
if (!global_options_set.x_warnings_are_errors
diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c
index 2c176160a52..d84a6549944 100644
--- a/gcc/tree-ssa-loop-ivopts.c
+++ b/gcc/tree-ssa-loop-ivopts.c
@@ -6182,35 +6182,24 @@ rewrite_use_nonlinear_expr (struct ivopts_data *data,
if (cand->pos == IP_ORIGINAL
&& cand->incremented_at == use->stmt)
{
- tree step, ctype, utype;
- enum tree_code incr_code = PLUS_EXPR, old_code;
+ enum tree_code stmt_code;
gcc_assert (is_gimple_assign (use->stmt));
gcc_assert (gimple_assign_lhs (use->stmt) == cand->var_after);
- step = cand->iv->step;
- ctype = TREE_TYPE (step);
- utype = TREE_TYPE (cand->var_after);
- if (TREE_CODE (step) == NEGATE_EXPR)
- {
- incr_code = MINUS_EXPR;
- step = TREE_OPERAND (step, 0);
- }
-
/* Check whether we may leave the computation unchanged.
This is the case only if it does not rely on other
computations in the loop -- otherwise, the computation
we rely upon may be removed in remove_unused_ivs,
thus leading to ICE. */
- old_code = gimple_assign_rhs_code (use->stmt);
- if (old_code == PLUS_EXPR
- || old_code == MINUS_EXPR
- || old_code == POINTER_PLUS_EXPR)
+ stmt_code = gimple_assign_rhs_code (use->stmt);
+ if (stmt_code == PLUS_EXPR
+ || stmt_code == MINUS_EXPR
+ || stmt_code == POINTER_PLUS_EXPR)
{
if (gimple_assign_rhs1 (use->stmt) == cand->var_before)
op = gimple_assign_rhs2 (use->stmt);
- else if (old_code != MINUS_EXPR
- && gimple_assign_rhs2 (use->stmt) == cand->var_before)
+ else if (gimple_assign_rhs2 (use->stmt) == cand->var_before)
op = gimple_assign_rhs1 (use->stmt);
else
op = NULL_TREE;
@@ -6218,24 +6207,13 @@ rewrite_use_nonlinear_expr (struct ivopts_data *data,
else
op = NULL_TREE;
- if (op
- && (TREE_CODE (op) == INTEGER_CST
- || operand_equal_p (op, step, 0)))
+ if (op && expr_invariant_in_loop_p (data->current_loop, op))
return;
-
- /* Otherwise, add the necessary computations to express
- the iv. */
- op = fold_convert (ctype, cand->var_before);
- comp = fold_convert (utype,
- build2 (incr_code, ctype, op,
- unshare_expr (step)));
- }
- else
- {
- comp = get_computation (data->current_loop, use, cand);
- gcc_assert (comp != NULL_TREE);
}
+ comp = get_computation (data->current_loop, use, cand);
+ gcc_assert (comp != NULL_TREE);
+
switch (gimple_code (use->stmt))
{
case GIMPLE_PHI:
diff --git a/gcc/tree-vect-slp.c b/gcc/tree-vect-slp.c
index bd3945801bc..f6c83b221b8 100644
--- a/gcc/tree-vect-slp.c
+++ b/gcc/tree-vect-slp.c
@@ -2985,7 +2985,8 @@ vect_schedule_slp (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo)
{
VEC (slp_instance, heap) *slp_instances;
slp_instance instance;
- unsigned int i, vf;
+ slp_tree loads_node;
+ unsigned int i, j, vf;
bool is_store = false;
if (loop_vinfo)
@@ -3004,6 +3005,15 @@ vect_schedule_slp (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo)
/* Schedule the tree of INSTANCE. */
is_store = vect_schedule_slp_instance (SLP_INSTANCE_TREE (instance),
instance, vf);
+
+ /* Clear STMT_VINFO_VEC_STMT of all loads. With shared loads
+ between SLP instances we fail to properly initialize the
+ vectorized SLP stmts and confuse different load permutations. */
+ FOR_EACH_VEC_ELT (slp_tree, SLP_INSTANCE_LOADS (instance), j, loads_node)
+ STMT_VINFO_VEC_STMT
+ (vinfo_for_stmt
+ (VEC_index (gimple, SLP_TREE_SCALAR_STMTS (loads_node), 0))) = NULL;
+
if (vect_print_dump_info (REPORT_VECTORIZED_LOCATIONS)
|| vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS))
fprintf (vect_dump, "vectorizing stmts using SLP.");
@@ -3016,7 +3026,15 @@ vect_schedule_slp (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo)
unsigned int j;
gimple_stmt_iterator gsi;
- vect_remove_slp_scalar_calls (root);
+ /* Remove scalar call stmts. Do not do this for basic-block
+ vectorization as not all uses may be vectorized.
+ ??? Why should this be necessary? DCE should be able to
+ remove the stmts itself.
+ ??? For BB vectorization we can as well remove scalar
+ stmts starting from the SLP tree root if they have no
+ uses. */
+ if (loop_vinfo)
+ vect_remove_slp_scalar_calls (root);
for (j = 0; VEC_iterate (gimple, SLP_TREE_SCALAR_STMTS (root), j, store)
&& j < SLP_INSTANCE_GROUP_SIZE (instance); j++)
diff --git a/gcc/tree-vect-stmts.c b/gcc/tree-vect-stmts.c
index 705f4f3a510..2dff7332206 100644
--- a/gcc/tree-vect-stmts.c
+++ b/gcc/tree-vect-stmts.c
@@ -5817,7 +5817,8 @@ get_vectype_for_scalar_type_and_size (tree scalar_type, unsigned size)
/* We can't build a vector type of elements with alignment bigger than
their size. */
else if (nbytes < TYPE_ALIGN_UNIT (scalar_type))
- scalar_type = lang_hooks.types.type_for_mode (inner_mode, 1);
+ scalar_type = lang_hooks.types.type_for_mode (inner_mode,
+ TYPE_UNSIGNED (scalar_type));
/* If we felt back to using the mode fail if there was
no scalar type for it. */
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 44222ea8b63..277f6fd40df 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,27 @@
+2013-03-25 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline:
+ 2013-03-13 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/49880
+ * config/sh/lib1funcs.S (sdivsi3_i4, udivsi3_i4): Enable for SH2A.
+ (sdivsi3, udivsi3): Remove SH4 check and always compile these functions.
+
+2013-03-06 Oleg Endo <olegendo@gcc.gnu.org>
+
+ Backport from mainline.
+ 2013-03-06 Oleg Endo <olegendo@gcc.gnu.org>
+
+ PR target/56529
+ * config/sh/lib1funcs.S (udivsi3_i4i, sdivsi3_i4i): Add __SH2A__ to
+ inclusion list.
+
+2013-03-06 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config.host (arm*-*-rtemself*): New.
+ (arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*): Rename
+ "arm*-*-rtemseabi*" to "arm*-*-rtems*".
+
2012-12-18 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org
Backport from mainline.
diff --git a/libgcc/config.host b/libgcc/config.host
index 2bd51590cbe..f19b49c3e88 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -367,11 +367,15 @@ arm*-*-ecos-elf)
tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
extra_parts="$extra_parts crti.o crtn.o"
;;
-arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*)
+arm*-*-rtemself*)
+ tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
+ extra_parts="$extra_parts crti.o crtn.o"
+ ;;
+arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)
tmake_file="${tmake_file} arm/t-arm arm/t-elf t-fixedpoint-gnu-prefix"
tm_file="$tm_file arm/bpabi-lib.h"
case ${host} in
- arm*-*-eabi* | arm*-*-rtemseabi*)
+ arm*-*-eabi* | arm*-*-rtems*)
tmake_file="${tmake_file} arm/t-bpabi"
extra_parts="crtbegin.o crtend.o crti.o crtn.o"
;;
@@ -384,10 +388,6 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtemseabi*)
tmake_file="$tmake_file t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
unwind_header=config/arm/unwind-arm.h
;;
-arm*-*-rtems*)
- tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
- extra_parts="$extra_parts crti.o crtn.o"
- ;;
arm*-*-elf)
tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
extra_parts="$extra_parts crti.o crtn.o"
diff --git a/libgcc/config/sh/lib1funcs.S b/libgcc/config/sh/lib1funcs.S
index 2f0ca16cd91..76e14df52c6 100644
--- a/libgcc/config/sh/lib1funcs.S
+++ b/libgcc/config/sh/lib1funcs.S
@@ -973,7 +973,7 @@ hiset: sts macl,r0 ! r0 = bb*dd
#ifdef L_sdivsi3_i4
.title "SH DIVIDE"
!! 4 byte integer Divide code for the Renesas SH
-#ifdef __SH4__
+#if defined (__SH4__) || defined (__SH2A__)
!! args in r4 and r5, result in fpul, clobber dr0, dr2
.global GLOBAL(sdivsi3_i4)
@@ -988,7 +988,7 @@ GLOBAL(sdivsi3_i4):
ftrc dr0,fpul
ENDFUNC(GLOBAL(sdivsi3_i4))
-#elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) || (defined (__SH5__) && ! defined __SH4_NOFPU__)
+#elif defined (__SH2A_SINGLE__) || defined (__SH2A_SINGLE_ONLY__) || defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) || (defined (__SH5__) && ! defined __SH4_NOFPU__)
!! args in r4 and r5, result in fpul, clobber r2, dr0, dr2
#if ! __SH5__ || __SH5__ == 32
@@ -1013,13 +1013,12 @@ GLOBAL(sdivsi3_i4):
ENDFUNC(GLOBAL(sdivsi3_i4))
#endif /* ! __SH5__ || __SH5__ == 32 */
-#endif /* ! __SH4__ */
+#endif /* ! __SH4__ || __SH2A__ */
#endif
#ifdef L_sdivsi3
/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh2e/sh3e code. */
-#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
!!
!! Steve Chamberlain
!! sac@cygnus.com
@@ -1336,13 +1335,12 @@ div0: rts
ENDFUNC(GLOBAL(sdivsi3))
#endif /* ! __SHMEDIA__ */
-#endif /* ! __SH4__ */
#endif
#ifdef L_udivsi3_i4
.title "SH DIVIDE"
!! 4 byte integer Divide code for the Renesas SH
-#ifdef __SH4__
+#if defined (__SH4__) || defined (__SH2A__)
!! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4,
!! and t bit
@@ -1384,7 +1382,7 @@ L1:
.double 2147483648
ENDFUNC(GLOBAL(udivsi3_i4))
-#elif defined (__SH5__) && ! defined (__SH4_NOFPU__)
+#elif defined (__SH5__) && ! defined (__SH4_NOFPU__) && ! defined (__SH2A_NOFPU__)
#if ! __SH5__ || __SH5__ == 32
!! args in r4 and r5, result in fpul, clobber r20, r21, dr0, fr33
.mode SHmedia
@@ -1405,7 +1403,7 @@ GLOBAL(udivsi3_i4):
ENDFUNC(GLOBAL(udivsi3_i4))
#endif /* ! __SH5__ || __SH5__ == 32 */
-#elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
+#elif defined (__SH2A_SINGLE__) || defined (__SH2A_SINGLE_ONLY__) || defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
!! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4
.global GLOBAL(udivsi3_i4)
@@ -1460,7 +1458,6 @@ L1:
#ifdef L_udivsi3
/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh2e/sh3e code. */
-#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
!! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
.global GLOBAL(udivsi3)
@@ -1655,7 +1652,6 @@ LOCAL(large_divisor):
ENDFUNC(GLOBAL(udivsi3))
#endif /* ! __SHMEDIA__ */
-#endif /* __SH4__ */
#endif /* L_udivsi3 */
#ifdef L_udivdi3
@@ -3255,8 +3251,8 @@ GLOBAL(div_table):
.word 17136
.word 16639
-#elif defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__)
-/* This code used shld, thus is not suitable for SH1 / SH2. */
+#elif defined (__SH2A__) || defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__)
+/* This code uses shld, thus is not suitable for SH1 / SH2. */
/* Signed / unsigned division without use of FPU, optimized for SH4.
Uses a lookup table for divisors in the range -128 .. +128, and
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index cd4e0861d24..282f3204d18 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,41 @@
+2013-03-16 Jonathan Wakely <jwakely.gcc@gmail.com>
+
+ PR libstdc++/56468
+ * libsupc++/exception_ptr.h (type_info): Declare.
+
+2013-03-16 Jonathan Wakely <jwakely.gcc@gmail.com>
+
+ PR libstdc++/56002
+ * include/std/mutex (lock_guard, unique_lock, lock): Define without
+ depending on _GLIBCXX_HAS_GTHREADS.
+ * testsuite/30_threads/lock_guard/cons/1.cc: Run on all targets.
+
+2013-03-09 François Dumont <fdumont@gcc.gnu.org>
+
+ * include/bits/vector.tcc (vector<>operator=(const vector<>&):
+ Reset pointers after deallocation when memory can be reused.
+ * testsuite/23_containers/vector/allocator/minimal.cc: Insert
+ elements to really challenge C++11 allocator integration.
+ * testsuite/23_containers/vector/allocator/copy.cc: Likewise.
+ * testsuite/23_containers/vector/allocator/copy_assign.cc:
+ Likewise.
+ * testsuite/23_containers/vector/allocator/move_assign.cc:
+ Likewise.
+ * testsuite/23_containers/vector/allocator/swap.cc: Likewise and
+ swap vector back before checks on memory/personality mapping are
+ performed.
+
+2013-02-26 Jonathan Wakely <jwakely.gcc@gmail.com>
+
+ PR libstdc++/56012
+ * include/bits/atomic_base.h (atomic_flag): Fix narrowing conversion.
+ * testsuite/29_atomics/atomic/operators/56012.cc: New.
+
+ PR libstdc++/56011
+ * include/std/atomic (atomic<bool>::operator=(bool) volatile): Add
+ missing overload.
+ * testsuite/29_atomics/atomic/operators/56011.cc: New.
+
2013-02-20 Jonathan Wakely <jwakely.gcc@gmail.com>
* include/std/streambuf (basic_streambuf): Fix unclosed Doxygen group.
diff --git a/libstdc++-v3/include/bits/atomic_base.h b/libstdc++-v3/include/bits/atomic_base.h
index bd14e35cd5a..191db7b5f01 100644
--- a/libstdc++-v3/include/bits/atomic_base.h
+++ b/libstdc++-v3/include/bits/atomic_base.h
@@ -212,6 +212,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
template<typename _Tp>
struct atomic<_Tp*>;
+ /* The target's "set" value for test-and-set may not be exactly 1. */
+#if __GCC_ATOMIC_TEST_AND_SET_TRUEVAL == 1
+ typedef bool __atomic_flag_data_type;
+#else
+ typedef unsigned char __atomic_flag_data_type;
+#endif
/**
* @brief Base type for atomic_flag.
@@ -227,12 +233,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
struct __atomic_flag_base
{
- /* The target's "set" value for test-and-set may not be exactly 1. */
-#if __GCC_ATOMIC_TEST_AND_SET_TRUEVAL == 1
- bool _M_i;
-#else
- unsigned char _M_i;
-#endif
+ __atomic_flag_data_type _M_i;
};
_GLIBCXX_END_EXTERN_C
@@ -250,7 +251,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
// Conversion to ATOMIC_FLAG_INIT.
constexpr atomic_flag(bool __i) noexcept
- : __atomic_flag_base({ __i ? __GCC_ATOMIC_TEST_AND_SET_TRUEVAL : 0 })
+ : __atomic_flag_base{ _S_init(__i) }
{ }
bool
@@ -284,6 +285,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
__atomic_clear (&_M_i, __m);
}
+
+ private:
+ static constexpr __atomic_flag_data_type
+ _S_init(bool __i)
+ { return __i ? __GCC_ATOMIC_TEST_AND_SET_TRUEVAL : 0; }
};
diff --git a/libstdc++-v3/include/bits/vector.tcc b/libstdc++-v3/include/bits/vector.tcc
index d9c3b659e6b..efa82ee374f 100644
--- a/libstdc++-v3/include/bits/vector.tcc
+++ b/libstdc++-v3/include/bits/vector.tcc
@@ -174,6 +174,9 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
_M_deallocate(this->_M_impl._M_start,
this->_M_impl._M_end_of_storage
- this->_M_impl._M_start);
+ this->_M_impl._M_start = nullptr;
+ this->_M_impl._M_finish = nullptr;
+ this->_M_impl._M_end_of_storage = nullptr;
}
std::__alloc_on_copy(_M_get_Tp_allocator(),
__x._M_get_Tp_allocator());
diff --git a/libstdc++-v3/include/std/atomic b/libstdc++-v3/include/std/atomic
index 31673e96a7c..a2f8058c895 100644
--- a/libstdc++-v3/include/std/atomic
+++ b/libstdc++-v3/include/std/atomic
@@ -69,6 +69,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
operator=(bool __i) noexcept
{ return _M_base.operator=(__i); }
+ bool
+ operator=(bool __i) volatile noexcept
+ { return _M_base.operator=(__i); }
+
operator bool() const noexcept
{ return _M_base.load(); }
diff --git a/libstdc++-v3/include/std/mutex b/libstdc++-v3/include/std/mutex
index 34d64c5b65f..fc9691971c6 100644
--- a/libstdc++-v3/include/std/mutex
+++ b/libstdc++-v3/include/std/mutex
@@ -1,6 +1,6 @@
// <mutex> -*- C++ -*-
-// Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+// Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2013
// Free Software Foundation, Inc.
//
// This file is part of the GNU ISO C++ Library. This library is free
@@ -46,12 +46,13 @@
#include <bits/gthr.h>
#include <bits/move.h> // for std::swap
-#if defined(_GLIBCXX_HAS_GTHREADS) && defined(_GLIBCXX_USE_C99_STDINT_TR1)
+#ifdef _GLIBCXX_USE_C99_STDINT_TR1
namespace std _GLIBCXX_VISIBILITY(default)
{
_GLIBCXX_BEGIN_NAMESPACE_VERSION
+#ifdef _GLIBCXX_HAS_GTHREADS
// Common base class for std::mutex and std::timed_mutex
class __mutex_base
{
@@ -420,6 +421,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
}
};
#endif
+#endif // _GLIBCXX_HAS_GTHREADS
/// Do not acquire ownership of the mutex.
struct defer_lock_t { };
@@ -755,6 +757,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
}
}
+#ifdef _GLIBCXX_HAS_GTHREADS
/// once_flag
struct once_flag
{
@@ -826,12 +829,13 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
if (__e)
__throw_system_error(__e);
}
+#endif // _GLIBCXX_HAS_GTHREADS
// @} group mutexes
_GLIBCXX_END_NAMESPACE_VERSION
} // namespace
-#endif // _GLIBCXX_HAS_GTHREADS && _GLIBCXX_USE_C99_STDINT_TR1
+#endif // _GLIBCXX_USE_C99_STDINT_TR1
#endif // __GXX_EXPERIMENTAL_CXX0X__
diff --git a/libstdc++-v3/libsupc++/exception_ptr.h b/libstdc++-v3/libsupc++/exception_ptr.h
index b6fd08e09a8..d9f8cc44a57 100644
--- a/libstdc++-v3/libsupc++/exception_ptr.h
+++ b/libstdc++-v3/libsupc++/exception_ptr.h
@@ -44,6 +44,8 @@ extern "C++" {
namespace std
{
+ class type_info;
+
/**
* @addtogroup exceptions
* @{
@@ -141,7 +143,7 @@ namespace std
operator==(const exception_ptr&, const exception_ptr&)
_GLIBCXX_USE_NOEXCEPT __attribute__ ((__pure__));
- const class type_info*
+ const class std::type_info*
__cxa_exception_type() const _GLIBCXX_USE_NOEXCEPT
__attribute__ ((__pure__));
};
diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/copy.cc b/libstdc++-v3/testsuite/23_containers/vector/allocator/copy.cc
index bcd521efe18..90a951e83cd 100644
--- a/libstdc++-v3/testsuite/23_containers/vector/allocator/copy.cc
+++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/copy.cc
@@ -31,6 +31,7 @@ void test01()
typedef propagating_allocator<T, false> alloc_type;
typedef std::vector<T, alloc_type> test_type;
test_type v1(alloc_type(1));
+ v1.push_back(T());
test_type v2(v1);
VERIFY(1 == v1.get_allocator().get_personality());
VERIFY(0 == v2.get_allocator().get_personality());
@@ -42,6 +43,7 @@ void test02()
typedef propagating_allocator<T, true> alloc_type;
typedef std::vector<T, alloc_type> test_type;
test_type v1(alloc_type(1));
+ v1.push_back(T());
test_type v2(v1);
VERIFY(1 == v1.get_allocator().get_personality());
VERIFY(1 == v2.get_allocator().get_personality());
diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/copy_assign.cc b/libstdc++-v3/testsuite/23_containers/vector/allocator/copy_assign.cc
index 0e2050e0e3c..4bc518956f4 100644
--- a/libstdc++-v3/testsuite/23_containers/vector/allocator/copy_assign.cc
+++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/copy_assign.cc
@@ -31,7 +31,9 @@ void test01()
typedef propagating_allocator<T, false> alloc_type;
typedef std::vector<T, alloc_type> test_type;
test_type v1(alloc_type(1));
+ v1.push_back(T());
test_type v2(alloc_type(2));
+ v2.push_back(T());
v2 = v1;
VERIFY(1 == v1.get_allocator().get_personality());
VERIFY(2 == v2.get_allocator().get_personality());
@@ -43,7 +45,9 @@ void test02()
typedef propagating_allocator<T, true> alloc_type;
typedef std::vector<T, alloc_type> test_type;
test_type v1(alloc_type(1));
+ v1.push_back(T());
test_type v2(alloc_type(2));
+ v2.push_back(T());
v2 = v1;
VERIFY(1 == v1.get_allocator().get_personality());
VERIFY(1 == v2.get_allocator().get_personality());
diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/minimal.cc b/libstdc++-v3/testsuite/23_containers/vector/allocator/minimal.cc
index 2d56884a436..f5c3a1898b8 100644
--- a/libstdc++-v3/testsuite/23_containers/vector/allocator/minimal.cc
+++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/minimal.cc
@@ -35,6 +35,7 @@ void test01()
typedef std::allocator_traits<alloc_type> traits_type;
typedef std::vector<T, alloc_type> test_type;
test_type v(alloc_type{});
+ v.push_back(T());
VERIFY( v.max_size() == traits_type::max_size(v.get_allocator()) );
}
diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc b/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc
index 2a792c61c89..def0b1a2ae2 100644
--- a/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc
+++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/move_assign.cc
@@ -31,7 +31,9 @@ void test01()
typedef propagating_allocator<T, false> alloc_type;
typedef std::vector<T, alloc_type> test_type;
test_type v1(alloc_type(1));
+ v1.push_back(T());
test_type v2(alloc_type(2));
+ v2.push_back(T());
v2 = std::move(v1);
VERIFY(1 == v1.get_allocator().get_personality());
VERIFY(2 == v2.get_allocator().get_personality());
@@ -43,8 +45,10 @@ void test02()
typedef propagating_allocator<T, true> alloc_type;
typedef std::vector<T, alloc_type> test_type;
test_type v1(alloc_type(1));
+ v1.push_back(T());
test_type v2(alloc_type(2));
v2 = std::move(v1);
+ v2.push_back(T());
VERIFY(0 == v1.get_allocator().get_personality());
VERIFY(1 == v2.get_allocator().get_personality());
}
diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/swap.cc b/libstdc++-v3/testsuite/23_containers/vector/allocator/swap.cc
index 808753e7520..79038d43058 100644
--- a/libstdc++-v3/testsuite/23_containers/vector/allocator/swap.cc
+++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/swap.cc
@@ -31,10 +31,14 @@ void test01()
typedef propagating_allocator<T, false> alloc_type;
typedef std::vector<T, alloc_type> test_type;
test_type v1(alloc_type(1));
+ v1.push_back(T());
test_type v2(alloc_type(2));
+ v2.push_back(T());
std::swap(v1, v2);
VERIFY(1 == v1.get_allocator().get_personality());
VERIFY(2 == v2.get_allocator().get_personality());
+ // swap back so assertions in uneq_allocator::deallocate don't fail
+ std::swap(v1, v2);
}
void test02()
diff --git a/libstdc++-v3/testsuite/29_atomics/atomic/operators/56011.cc b/libstdc++-v3/testsuite/29_atomics/atomic/operators/56011.cc
new file mode 100644
index 00000000000..1d77a55b213
--- /dev/null
+++ b/libstdc++-v3/testsuite/29_atomics/atomic/operators/56011.cc
@@ -0,0 +1,29 @@
+// { dg-options "-std=gnu++0x" }
+// { dg-do compile }
+
+// Copyright (C) 2013 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <atomic>
+void test01()
+{
+ using namespace std;
+ volatile atomic<bool> ab1 __attribute__((unused));
+ ab1 = true;
+ volatile atomic_bool ab2 __attribute__((unused));
+ ab2 = true;
+}
diff --git a/libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/56012.cc b/libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/56012.cc
new file mode 100644
index 00000000000..64f3b972934
--- /dev/null
+++ b/libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/56012.cc
@@ -0,0 +1,26 @@
+// { dg-options "-std=gnu++0x -Wsystem-headers -Wnarrowing" }
+// { dg-do compile }
+
+// Copyright (C) 2013 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <atomic>
+void test01()
+{
+ using namespace std;
+ atomic_flag af __attribute__((unused)) = ATOMIC_FLAG_INIT;
+}
diff --git a/libstdc++-v3/testsuite/30_threads/lock_guard/cons/1.cc b/libstdc++-v3/testsuite/30_threads/lock_guard/cons/1.cc
index c135e28e48b..470fc4c49c4 100644
--- a/libstdc++-v3/testsuite/30_threads/lock_guard/cons/1.cc
+++ b/libstdc++-v3/testsuite/30_threads/lock_guard/cons/1.cc
@@ -1,11 +1,8 @@
-// { dg-do run { target *-*-freebsd* *-*-netbsd* *-*-linux* *-*-solaris* *-*-cygwin *-*-darwin* alpha*-*-osf* mips-sgi-irix6* powerpc-ibm-aix* } }
-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* alpha*-*-osf* mips-sgi-irix6* powerpc-ibm-aix* } }
-// { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } }
-// { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } }
+// { dg-do run }
+// { dg-options " -std=gnu++11 " }
// { dg-require-cstdint "" }
-// { dg-require-gthreads "" }
-// Copyright (C) 2010, 2011, 2012 Free Software Foundation, Inc.
+// Copyright (C) 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
//
// This file is part of the GNU ISO C++ Library. This library is free
// software; you can redistribute it and/or modify it under the