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authorChristophe Lyon <christophe.lyon@linaro.org>2017-01-30 10:21:39 +0000
committerYvan Roux <yvan.roux@linaro.org>2017-01-31 09:12:25 +0000
commit226a1dbbe2ea33b6f0e3edac50e56e10a799f3ac (patch)
treee1b40e45bf89aee97c00c466dabd2d6edad4f5c9
parent3a3a5fdedabe435e7023e512af570ca1ed82a131 (diff)
gcc/
Backport from trunk r244894. 2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/79145 * config/arm/arm.md (xordi3): Force constant operand into a register for TARGET_IWMMXT. gcc/testsuite/ Backport from trunk r244894. 2016-01-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/79145 * gcc.target/arm/pr79145.c: New test. Change-Id: Ia1ee8c855c4324fc3226fbc04bd485911c2c6289
-rw-r--r--gcc/config/arm/arm.md9
-rw-r--r--gcc/testsuite/gcc.target/arm/pr79145.c16
2 files changed, 24 insertions, 1 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 498624468c1..5cc69974388 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3313,7 +3313,14 @@
(xor:DI (match_operand:DI 1 "s_register_operand" "")
(match_operand:DI 2 "arm_xordi_operand" "")))]
"TARGET_32BIT"
- ""
+ {
+ /* The iWMMXt pattern for xordi3 accepts only register operands but we want
+ to reuse this expander for all TARGET_32BIT targets so just force the
+ constants into a register. Unlike for the anddi3 and iordi3 there are
+ no NEON instructions that take an immediate. */
+ if (TARGET_IWMMXT && !REG_P (operands[2]))
+ operands[2] = force_reg (DImode, operands[2]);
+ }
)
(define_insn_and_split "*xordi3_insn"
diff --git a/gcc/testsuite/gcc.target/arm/pr79145.c b/gcc/testsuite/gcc.target/arm/pr79145.c
new file mode 100644
index 00000000000..66782440039
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr79145.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_iwmmxt_ok } */
+/* { dg-options "-mcpu=iwmmxt" } */
+
+int
+main (void)
+{
+ volatile long long t1;
+ t1 ^= 0x55;
+ return 0;
+}