diff options
| author | Yvan Roux <yvan.roux@linaro.org> | 2015-12-28 09:42:36 +0100 |
|---|---|---|
| committer | Linaro Code Review <review@review.linaro.org> | 2016-01-12 14:56:19 +0000 |
| commit | 6a8906355e2d51888ce46a1b9be129400a7fd1d2 (patch) | |
| tree | cd55a13debbea7a103a76305fbdee0ea77a623f5 | |
| parent | 6983eeff42a1a74f40cc1b98a67f64a86daae8e6 (diff) | |
gcc/
Backport from trunk r230814.
2015-11-24 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/config/aarch64/aarch64.md (add<mode>3):
Block early expansion into 2 add instructions.
(add<mode>3_pluslong): New pattern to combine complex
immediates into 2 additions.
Change-Id: I6148658a42d71f966b56222af98d5b43eb4595ae
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 54 |
1 files changed, 35 insertions, 19 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 49d7eba2931..6506e17e441 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1581,30 +1581,46 @@ (match_operand:GPI 2 "aarch64_pluslong_operand" "")))] "" " - if (! aarch64_plus_operand (operands[2], VOIDmode)) + if (!aarch64_plus_operand (operands[2], VOIDmode)) { - HOST_WIDE_INT imm = INTVAL (operands[2]); - - if (aarch64_move_imm (imm, <MODE>mode) && can_create_pseudo_p ()) - { + if (can_create_pseudo_p ()) + { rtx tmp = gen_reg_rtx (<MODE>mode); emit_move_insn (tmp, operands[2]); operands[2] = tmp; - } + } else - { - rtx subtarget = ((optimize && can_create_pseudo_p ()) - ? gen_reg_rtx (<MODE>mode) : operands[0]); - - if (imm < 0) - imm = -(-imm & ~0xfff); - else - imm &= ~0xfff; - - emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm))); - operands[1] = subtarget; - operands[2] = GEN_INT (INTVAL (operands[2]) - imm); - } + { + HOST_WIDE_INT imm = INTVAL (operands[2]); + imm = imm >= 0 ? imm & 0xfff : -(-imm & 0xfff); + emit_insn (gen_add<mode>3 (operands[0], operands[1], + GEN_INT (INTVAL (operands[2]) - imm))); + operands[1] = operands[0]; + operands[2] = GEN_INT (imm); + } + } + " +) + +;; Find add with a 2-instruction immediate and merge into 2 add instructions. + +(define_insn_and_split "*add<mode>3_pluslong" + [(set + (match_operand:GPI 0 "register_operand" "") + (plus:GPI (match_operand:GPI 1 "register_operand" "") + (match_operand:GPI 2 "aarch64_pluslong_operand" "")))] + "!aarch64_plus_operand (operands[2], VOIDmode) + && !aarch64_move_imm (INTVAL (operands[2]), <MODE>mode)" + "#" + "&& true" + [(set (match_dup 0) (plus:GPI (match_dup 1) (match_dup 3))) + (set (match_dup 0) (plus:GPI (match_dup 0) (match_dup 4)))] + " + { + HOST_WIDE_INT imm = INTVAL (operands[2]); + imm = imm >= 0 ? imm & 0xfff : -(-imm & 0xfff); + operands[3] = GEN_INT (INTVAL (operands[2]) - imm); + operands[4] = GEN_INT (imm); } " ) |