From f81c60c24497e912d2fcf9d250c6f3de01db68b9 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 26 Apr 2022 17:04:20 +0100 Subject: target/arm: Advertise support for FEAT_TTL The Arm FEAT_TTL architectural feature allows the guest to provide an optional hint in an AArch64 TLB invalidate operation about which translation table level holds the leaf entry for the address being invalidated. QEMU's TLB implementation doesn't need that hint, and we correctly ignore the (previously RES0) bits in TLB invalidate operation values that are now used for the TTL field. So we can simply advertise support for it in our 'max' CPU. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220426160422.2353158-2-peter.maydell@linaro.org --- docs/system/arm/emulation.rst | 1 + 1 file changed, 1 insertion(+) (limited to 'docs/system') diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 520fd39071..6ed2417f6f 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -54,6 +54,7 @@ the following architecture extensions: - FEAT_TLBIOS (TLB invalidate instructions in Outer Shareable domain) - FEAT_TLBIRANGE (TLB invalidate range instructions) - FEAT_TTCNP (Translation table Common not private translations) +- FEAT_TTL (Translation Table Level) - FEAT_TTST (Small translation tables) - FEAT_UAO (Unprivileged Access Override control) - FEAT_VHE (Virtualization Host Extensions) -- cgit v1.2.3