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AgeCommit message (Expand)Author
2022-05-12target/i386: do not consult nonexistent host leavesPaolo Bonzini
2022-05-11Clean up decorations and whitespace around header guardsMarkus Armbruster
2022-05-11Normalize header guard symbol definitionMarkus Armbruster
2022-05-11Clean up ill-advised or unusual header guardsMarkus Armbruster
2022-05-11Clean up header guards that don't match their file nameMarkus Armbruster
2022-05-09Merge tag 'pull-target-arm-20220509' of https://git.linaro.org/people/pmaydel...Richard Henderson
2022-05-09target/arm: Define neoverse-n1Richard Henderson
2022-05-09target/arm: Define cortex-a76Richard Henderson
2022-05-09target/arm: Enable FEAT_DGH for -cpu maxRichard Henderson
2022-05-09target/arm: Enable FEAT_CSV3 for -cpu maxRichard Henderson
2022-05-09target/arm: Enable FEAT_CSV2_2 for -cpu maxRichard Henderson
2022-05-09target/arm: Enable FEAT_CSV2 for -cpu maxRichard Henderson
2022-05-09target/arm: Enable FEAT_IESB for -cpu maxRichard Henderson
2022-05-09target/arm: Enable FEAT_RAS for -cpu maxRichard Henderson
2022-05-09target/arm: Implement ESB instructionRichard Henderson
2022-05-09target/arm: Implement virtual SError exceptionsRichard Henderson
2022-05-09target/arm: Enable SCR and HCR bits for RASRichard Henderson
2022-05-09target/arm: Add minimal RAS registersRichard Henderson
2022-05-09target/arm: Enable FEAT_Debugv8p4 for -cpu maxRichard Henderson
2022-05-09target/arm: Enable FEAT_Debugv8p2 for -cpu maxRichard Henderson
2022-05-09target/arm: Use field names for manipulating EL2 and EL3 modesRichard Henderson
2022-05-09target/arm: Annotate arm_max_initfn with FEAT identifiersRichard Henderson
2022-05-09target/arm: Split out aa32_max_featuresRichard Henderson
2022-05-09target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu maxRichard Henderson
2022-05-09target/arm: Update qemu-system-arm -cpu max to cortex-a57Richard Henderson
2022-05-09target/arm: Move cortex impdef sysregs to cpu_tcg.cRichard Henderson
2022-05-09target/arm: Adjust definition of CONTEXTIDR_EL2Richard Henderson
2022-05-09target/arm: Merge zcr reginfoRichard Henderson
2022-05-09target/arm: Drop EL3 no EL2 fallbacksRichard Henderson
2022-05-09target/arm: Handle cpreg registration for missing ELRichard Henderson
2022-05-09disas: Remove old libopcode ppc disassemblerThomas Huth
2022-05-09disas: Remove old libopcode i386 disassemblerThomas Huth
2022-05-09disas: Remove old libopcode arm disassemblerThomas Huth
2022-05-07Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson
2022-05-07WHPX: support for xcr0Sunil Muthuswamy
2022-05-06target/xtensa: implement cache test option opcodesMax Filippov
2022-05-06target/xtensa: add clock input to xtensa CPUMax Filippov
2022-05-06target/xtensa: import core lx106Simon Safar
2022-05-06target/xtensa: use tcg_constant_* for remaining opcodesMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for FPU conversion opcodesMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for numbered special registersMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for TLB opcodesMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for exceptionsMax Filippov
2022-05-06target/xtensa: use tcg_contatnt_* for numeric literalsMax Filippov
2022-05-06target/xtensa: fix missing tcg_temp_free in gen_window_checkMax Filippov
2022-05-05target/ppc: Change MSR_* to follow POWER ISA numbering conventionVíctor Colombo
2022-05-05target/ppc: Add unused msr bits FIELDsVíctor Colombo
2022-05-05target/ppc: Remove msr_de macroVíctor Colombo
2022-05-05target/ppc: Remove msr_hv macroVíctor Colombo
2022-05-05target/ppc: Remove msr_ts macroVíctor Colombo
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