summaryrefslogtreecommitdiff
path: root/target/loongarch
AgeCommit message (Expand)Author
2022-07-29hw/loongarch: Rename file 'loongson3.XXX' to 'virt.XXX'Xiaojuan Yang
2022-07-19hw/loongarch: Add fdt supportXiaojuan Yang
2022-07-19target/loongarch: Fix float_convd/float_convs test failingSong Gao
2022-07-19target/loongarch/cpu: Fix cpucfg default valueXiaojuan Yang
2022-07-19target/loongarch/op_helper: Fix coverity cond_at_most errorXiaojuan Yang
2022-07-19target/loongarch/tlb_helper: Fix coverity integer overflow errorXiaojuan Yang
2022-07-19target/loongarch/cpu: Fix coverity errors about excp_namesXiaojuan Yang
2022-07-19target/loongarch: Fix loongarch_cpu_class_by_nameXiaojuan Yang
2022-07-05target/loongarch: Clean up tlb when cpu resetSong Gao
2022-07-04target/loongarch: Add lock when writing timer clear regXiaojuan Yang
2022-07-04target/loongarch: Fix the meaning of ECFG reg's VS fieldXiaojuan Yang
2022-07-04target/loongarch: Update READMESong Gao
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao
2022-07-04target/loongarch: remove unused include hw/loader.hSong Gao
2022-07-04target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exceptionSong Gao
2022-07-04target/loongarch: Fix missing update CSR_BADVSong Gao
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao
2022-06-06target/loongarch: Add gdb support.Xiaojuan Yang
2022-06-06hw/loongarch: Add LoongArch load elf function.Xiaojuan Yang
2022-06-06hw/loongarch: Add support loongson3 virt machine type.Xiaojuan Yang
2022-06-06target/loongarch: Add timer related instructions support.Xiaojuan Yang
2022-06-06target/loongarch: Add other core instructions supportXiaojuan Yang
2022-06-06target/loongarch: Add TLB instruction supportXiaojuan Yang
2022-06-06target/loongarch: Add LoongArch IOCSR instructionXiaojuan Yang
2022-06-06target/loongarch: Add LoongArch CSR instructionXiaojuan Yang
2022-06-06target/loongarch: Add constant timer supportXiaojuan Yang
2022-06-06target/loongarch: Add LoongArch interrupt and exception handleXiaojuan Yang
2022-06-06target/loongarch: Add MMU support for LoongArch CPU.Xiaojuan Yang
2022-06-06target/loongarch: Implement qmp_query_cpu_definitions()Xiaojuan Yang
2022-06-06target/loongarch: Add basic vmstate description of CPU.Xiaojuan Yang
2022-06-06target/loongarch: Add CSRs definitionXiaojuan Yang
2022-06-06target/loongarch: Add system emulation introductionXiaojuan Yang
2022-06-06target/loongarch: Add target build suportSong Gao
2022-06-06target/loongarch: Add disassemblerSong Gao
2022-06-06target/loongarch: Add branch instruction translationSong Gao
2022-06-06target/loongarch: Add floating point load/store instruction translationSong Gao
2022-06-06target/loongarch: Add floating point move instruction translationSong Gao
2022-06-06target/loongarch: Add floating point conversion instruction translationSong Gao
2022-06-06target/loongarch: Add floating point comparison instruction translationSong Gao
2022-06-06target/loongarch: Add floating point arithmetic instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point extra instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point atomic instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point load/store instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point bit instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point shift instruction translationSong Gao
2022-06-06target/loongarch: Add fixed point arithmetic instruction translationSong Gao
2022-06-06target/loongarch: Add main translation routinesSong Gao
2022-06-06target/loongarch: Add core definitionSong Gao
2022-06-06target/loongarch: Add READMESong Gao