ci/qemu.git - [no description]

Age	Commit message (Expand)	Author
2022-04-20	exec/translator: Pass the locked filepointer to disas_log hook	Richard Henderson
2021-10-15	target/avr: Drop checks for singlestep_enabled	Richard Henderson
2021-09-16	target/avr: Fix compiler errors (-Werror=enum-conversion)	Stefan Weil
2021-07-21	accel/tcg: Remove TranslatorOps.breakpoint_check	Richard Henderson
2021-07-21	target/avr: Implement gdb_adjust_breakpoint	Richard Henderson
2021-07-09	target/avr: Use translator_use_goto_tb	Richard Henderson
2021-06-29	target/avr: Convert to TranslatorOps	Richard Henderson
2021-06-29	target/avr: Change ctx to DisasContext* in gen_intermediate_code	Richard Henderson
2021-06-29	target/avr: Add DisasContextBase to DisasContext	Richard Henderson
2020-08-21	meson: target	Paolo Bonzini
2020-08-21	meson: rename included C source files to .c.inc	Paolo Bonzini
2020-07-11	target/avr: Add support for disassembling via option '-d in_asm'	Michael Rolnik
2020-07-11	target/avr: Initialize TCG register variables	Michael Rolnik
2020-07-11	target/avr: Add instruction translation - CPU main translation function	Michael Rolnik
2020-07-11	target/avr: Add instruction translation - MCU Control Instructions	Michael Rolnik
2020-07-11	target/avr: Add instruction translation - Bit and Bit-test Instructions	Michael Rolnik
2020-07-11	target/avr: Add instruction translation - Data Transfer Instructions	Michael Rolnik
2020-07-11	target/avr: Add instruction translation - Branch Instructions	Michael Rolnik
2020-07-11	target/avr: Add instruction translation - Arithmetic and Logic Instructions	Michael Rolnik
2020-07-11	target/avr: Add instruction translation - Register definitions	Michael Rolnik