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authorRichard Henderson <richard.henderson@linaro.org>2020-09-03 15:19:03 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-10-08 05:57:32 -0500
commit9be0d08019465b38e2f1a605960961a491430c21 (patch)
tree1872fa73f3c6ac908d924141f0359dd32e441ade /tcg/aarch64/tcg-target.c.inc
parente2e7168a214b0ed98dc357bba96816486a289762 (diff)
tcg: Drop union from TCGArgConstraint
The union is unused; let "regs" appear in the main structure without the "u.regs" wrapping. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.c.inc')
-rw-r--r--tcg/aarch64/tcg-target.c.inc14
1 files changed, 7 insertions, 7 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 2607fe4ab9..dbe5c6a14c 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -129,22 +129,22 @@ static const char *target_parse_constraint(TCGArgConstraint *ct,
switch (*ct_str++) {
case 'r': /* general registers */
ct->ct |= TCG_CT_REG;
- ct->u.regs |= 0xffffffffu;
+ ct->regs |= 0xffffffffu;
break;
case 'w': /* advsimd registers */
ct->ct |= TCG_CT_REG;
- ct->u.regs |= 0xffffffff00000000ull;
+ ct->regs |= 0xffffffff00000000ull;
break;
case 'l': /* qemu_ld / qemu_st address, data_reg */
ct->ct |= TCG_CT_REG;
- ct->u.regs = 0xffffffffu;
+ ct->regs = 0xffffffffu;
#ifdef CONFIG_SOFTMMU
/* x0 and x1 will be overwritten when reading the tlb entry,
and x2, and x3 for helper args, better to avoid using them. */
- tcg_regset_reset_reg(ct->u.regs, TCG_REG_X0);
- tcg_regset_reset_reg(ct->u.regs, TCG_REG_X1);
- tcg_regset_reset_reg(ct->u.regs, TCG_REG_X2);
- tcg_regset_reset_reg(ct->u.regs, TCG_REG_X3);
+ tcg_regset_reset_reg(ct->regs, TCG_REG_X0);
+ tcg_regset_reset_reg(ct->regs, TCG_REG_X1);
+ tcg_regset_reset_reg(ct->regs, TCG_REG_X2);
+ tcg_regset_reset_reg(ct->regs, TCG_REG_X3);
#endif
break;
case 'A': /* Valid for arithmetic immediate (positive or negative). */