diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-04-21 08:16:56 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-04-26 08:16:41 -0700 |
| commit | bf754c96b24e3e22d80121b63b19eb27067dcea5 (patch) | |
| tree | 8d799a9a74cfe26b0fe732f56aa812820227fb5e /target/nios2 | |
| parent | e96568a46141557aa71df877f2222fe9993c127e (diff) | |
target/nios2: Use hw/registerfields.h for CR_EXCEPTION fields
Use FIELD_DP32 instead of manual shifting and masking.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-26-richard.henderson@linaro.org>
Diffstat (limited to 'target/nios2')
| -rw-r--r-- | target/nios2/cpu.h | 4 | ||||
| -rw-r--r-- | target/nios2/helper.c | 37 |
2 files changed, 26 insertions, 15 deletions
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 562dca8195..f8cd5dc218 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -105,6 +105,10 @@ FIELD(CR_STATUS, RSIE, 23, 1) #define CR_CPUID 5 #define CR_CTL6 6 #define CR_EXCEPTION 7 + +FIELD(CR_EXCEPTION, CAUSE, 2, 5) +FIELD(CR_EXCEPTION, ECCFTL, 31, 1) + #define CR_PTEADDR 8 #define CR_PTEADDR_PTBASE_SHIFT 22 #define CR_PTEADDR_PTBASE_MASK (0x3FF << CR_PTEADDR_PTBASE_SHIFT) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 2e5f5b8b54..b30740824c 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -44,8 +44,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |= CR_STATUS_IH; env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_EXCEPTION] &= ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |= (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); env->regs[R_EA] = env->pc + 4; env->pc = cpu->exception_addr; @@ -63,8 +64,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |= CR_STATUS_EH; env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_EXCEPTION] &= ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |= (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); env->ctrl[CR_TLBMISC] &= ~CR_TLBMISC_DBL; env->ctrl[CR_TLBMISC] |= CR_TLBMISC_WR; @@ -78,8 +80,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |= CR_STATUS_EH; env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_EXCEPTION] &= ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |= (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); env->ctrl[CR_TLBMISC] |= CR_TLBMISC_DBL; @@ -96,8 +99,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |= CR_STATUS_EH; env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_EXCEPTION] &= ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |= (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) { env->ctrl[CR_TLBMISC] |= CR_TLBMISC_WR; @@ -120,8 +124,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |= CR_STATUS_EH; env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_EXCEPTION] &= ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |= (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); env->pc = cpu->exception_addr; break; @@ -138,8 +143,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |= CR_STATUS_EH; env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_EXCEPTION] &= ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |= (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); env->pc = cpu->exception_addr; break; @@ -163,8 +169,9 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->ctrl[CR_STATUS] |= CR_STATUS_EH; env->ctrl[CR_STATUS] &= ~(CR_STATUS_PIE | CR_STATUS_U); - env->ctrl[CR_EXCEPTION] &= ~(0x1F << 2); - env->ctrl[CR_EXCEPTION] |= (cs->exception_index & 0x1F) << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(env->ctrl[CR_EXCEPTION], + CR_EXCEPTION, CAUSE, + cs->exception_index); env->pc = cpu->exception_addr; break; @@ -208,7 +215,7 @@ void nios2_cpu_do_unaligned_access(CPUState *cs, vaddr addr, CPUNios2State *env = &cpu->env; env->ctrl[CR_BADADDR] = addr; - env->ctrl[CR_EXCEPTION] = EXCP_UNALIGN << 2; + env->ctrl[CR_EXCEPTION] = FIELD_DP32(0, CR_EXCEPTION, CAUSE, EXCP_UNALIGN); helper_raise_exception(env, EXCP_UNALIGN); } |