diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-07-29 19:17:02 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-08-02 12:34:00 -0700 |
| commit | d44971e725c02e0656d2f53d4fb564f92e06aef7 (patch) | |
| tree | bd997d6fd75f68109c166243284c14ad074e2034 /target/mips/tcg/mips16e_translate.c.inc | |
| parent | 430a388ef4a6e02e762a9c5f86c539f886a6a61a (diff) | |
target/mips: Advance pc after semihosting exception
Delay generating the exception until after we know the
insn length, and record that length in env->error_code.
Fixes: 8ec7e3c53d4 ("target/mips: Use an exception for semihosting")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1126
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips/tcg/mips16e_translate.c.inc')
| -rw-r--r-- | target/mips/tcg/mips16e_translate.c.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/tcg/mips16e_translate.c.inc b/target/mips/tcg/mips16e_translate.c.inc index 0a3ba252e4..7568933e23 100644 --- a/target/mips/tcg/mips16e_translate.c.inc +++ b/target/mips/tcg/mips16e_translate.c.inc @@ -952,7 +952,7 @@ static int decode_ase_mips16e(CPUMIPSState *env, DisasContext *ctx) break; case RR_SDBBP: if (is_uhi(extract32(ctx->opcode, 5, 6))) { - generate_exception_end(ctx, EXCP_SEMIHOST); + ctx->base.is_jmp = DISAS_SEMIHOST; } else { /* * XXX: not clear which exception should be raised |