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authorSong Gao <gaosong@loongson.cn>2022-06-24 11:10:44 +0800
committerRichard Henderson <richard.henderson@linaro.org>2022-07-04 11:08:58 +0530
commit7d552f0e0abfdfa88ad1825297a7077397e1ae95 (patch)
tree48936035e3dd4ba6c0465461f5b64f45fdb77708 /target/loongarch
parentfffca8f227a9bab76af77f9b828cba94cafe119e (diff)
target/loongarch: Fix missing update CSR_BADV
loongarch_cpu_do_interrupt() should update CSR_BADV for some EXCCODE. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220624031049.1716097-9-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/loongarch')
-rw-r--r--target/loongarch/cpu.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 4c8f96bc3a..e32d4cc269 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -171,18 +171,20 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
cause = cs->exception_index;
update_badinstr = 0;
break;
- case EXCCODE_ADEM:
case EXCCODE_SYS:
case EXCCODE_BRK:
+ case EXCCODE_INE:
+ case EXCCODE_IPE:
+ case EXCCODE_FPE:
+ env->CSR_BADV = env->pc;
+ QEMU_FALLTHROUGH;
+ case EXCCODE_ADEM:
case EXCCODE_PIL:
case EXCCODE_PIS:
case EXCCODE_PME:
case EXCCODE_PNR:
case EXCCODE_PNX:
case EXCCODE_PPI:
- case EXCCODE_INE:
- case EXCCODE_IPE:
- case EXCCODE_FPE:
cause = cs->exception_index;
break;
default: