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authorPeter Maydell <peter.maydell@linaro.org>2020-08-28 19:33:24 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-09-01 11:19:32 +0100
commita149e2de0b63e3906729ed1d3df7d9ecdb6de5e6 (patch)
tree0c7a5d7d6c418e21489afabe7cb7ec472978ab3f /target/arm/vfp.decode
parent414ba270c4fb758d987adf37ae9bfe531715c604 (diff)
target/arm: Implement VFP fp16 VCVT between float and fixed-point
Implement the fp16 versions of the VFP VCVT instruction forms which convert between floating point and fixed-point. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-16-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/vfp.decode')
-rw-r--r--target/arm/vfp.decode2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode
index 642ec039e3..a8f1137be1 100644
--- a/target/arm/vfp.decode
+++ b/target/arm/vfp.decode
@@ -225,6 +225,8 @@ VJCVT ---- 1110 1.11 1001 .... 1011 11.0 .... @vfp_dm_sd
# We assemble bits 18 (op), 16 (u) and 7 (sx) into a single opc field
# for the convenience of the trans_VCVT_fix functions.
%vcvt_fix_op 18:1 16:1 7:1
+VCVT_fix_hp ---- 1110 1.11 1.1. .... 1001 .1.0 .... \
+ vd=%vd_sp imm=%vm_sp opc=%vcvt_fix_op
VCVT_fix_sp ---- 1110 1.11 1.1. .... 1010 .1.0 .... \
vd=%vd_sp imm=%vm_sp opc=%vcvt_fix_op
VCVT_fix_dp ---- 1110 1.11 1.1. .... 1011 .1.0 .... \