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authorRichard Henderson <richard.henderson@linaro.org>2021-05-25 15:58:08 -0700
committerPeter Maydell <peter.maydell@linaro.org>2021-06-03 16:43:26 +0100
commit3a98ac40fa9fca85bb37f4281e872b7519e733c5 (patch)
tree3bdeb6c155cb03d4830914dc6647852d9e446375 /target/arm/vfp.decode
parentfc5200ee4583cb9110ee7bda71a65890d787882e (diff)
target/arm: Implement scalar float32 to bfloat16 conversion
This is the 64-bit BFCVT and the 32-bit VCVT{B,T}.BF16.F32. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210525225817.400336-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/vfp.decode')
-rw-r--r--target/arm/vfp.decode2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode
index 6f7f28f9a4..52535d9b0b 100644
--- a/target/arm/vfp.decode
+++ b/target/arm/vfp.decode
@@ -205,6 +205,8 @@ VCVT_f64_f16 ---- 1110 1.11 0010 .... 1011 t:1 1.0 .... \
# VCVTB and VCVTT to f16: Vd format is always vd_sp;
# Vm format depends on size bit
+VCVT_b16_f32 ---- 1110 1.11 0011 .... 1001 t:1 1.0 .... \
+ vd=%vd_sp vm=%vm_sp
VCVT_f16_f32 ---- 1110 1.11 0011 .... 1010 t:1 1.0 .... \
vd=%vd_sp vm=%vm_sp
VCVT_f16_f64 ---- 1110 1.11 0011 .... 1011 t:1 1.0 .... \