diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-04-26 09:30:10 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-28 13:35:58 +0100 |
| commit | a8b05af13325485bb17f47100c7de6993f8a3771 (patch) | |
| tree | 1730ad0c20100a57faee714c2d2e696476c01962 /target/arm/translate-a64.c | |
| parent | 858943f0e27f73eb9c7485f3c241941d19e960f4 (diff) | |
target/arm: Use tcg_constant in disas_cond_select
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
| -rw-r--r-- | target/arm/translate-a64.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 3de2b27cc7..9b678cc5af 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5255,7 +5255,7 @@ static void disas_cond_select(DisasContext *s, uint32_t insn) tcg_rd = cpu_reg(s, rd); a64_test_cc(&c, cond); - zero = tcg_const_i64(0); + zero = tcg_constant_i64(0); if (rn == 31 && rm == 31 && (else_inc ^ else_inv)) { /* CSET & CSETM. */ @@ -5276,7 +5276,6 @@ static void disas_cond_select(DisasContext *s, uint32_t insn) tcg_gen_movcond_i64(c.cond, tcg_rd, c.value, zero, t_true, t_false); } - tcg_temp_free_i64(zero); a64_free_cc(&c); if (!sf) { |