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authorRichard Henderson <richard.henderson@linaro.org>2022-04-26 09:30:03 -0700
committerPeter Maydell <peter.maydell@linaro.org>2022-04-28 13:35:57 +0100
commit820b357a49507f943287a8019e891f527db6f729 (patch)
tree3abd1befcedbd147fdf052d6269ab8319e99f862 /target/arm/translate-a64.c
parentd7eeaa095671fc14415c59ae442266b6db4dfcf9 (diff)
target/arm: Use tcg_constant in disas_exc
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220426163043.100432-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
-rw-r--r--target/arm/translate-a64.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 5d1bccaf46..68e3b5c1f8 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2015,7 +2015,6 @@ static void disas_exc(DisasContext *s, uint32_t insn)
int opc = extract32(insn, 21, 3);
int op2_ll = extract32(insn, 0, 5);
int imm16 = extract32(insn, 5, 16);
- TCGv_i32 tmp;
switch (opc) {
case 0:
@@ -2050,9 +2049,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
break;
}
gen_a64_set_pc_im(s->pc_curr);
- tmp = tcg_const_i32(syn_aa64_smc(imm16));
- gen_helper_pre_smc(cpu_env, tmp);
- tcg_temp_free_i32(tmp);
+ gen_helper_pre_smc(cpu_env, tcg_constant_i32(syn_aa64_smc(imm16)));
gen_ss_advance(s);
gen_exception_insn(s, s->base.pc_next, EXCP_SMC,
syn_aa64_smc(imm16), 3);