diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2017-09-07 13:54:54 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2017-09-07 13:54:54 +0100 |
commit | 334e8dad7a109d15cb20b090131374ae98682a50 (patch) | |
tree | 2fba32a173c5a786c993ff609098e4403cd405e9 /target/arm/machine.c | |
parent | c51a5cfc9fae82099028eb12cb1d064ee07f348e (diff) |
target/arm: Make CFSR register banked for v8M
Make the CFSR register banked if v8M security extensions are enabled.
Not all the bits in this register are banked: the BFSR
bits [15:8] are shared between S and NS, and we store them
in the NS copy of the register.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1503414539-28762-19-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/machine.c')
-rw-r--r-- | target/arm/machine.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/arm/machine.c b/target/arm/machine.c index 7a969869dc..0bcaa68d18 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -118,7 +118,7 @@ static const VMStateDescription vmstate_m = { VMSTATE_UINT32(env.v7m.basepri[M_REG_NS], ARMCPU), VMSTATE_UINT32(env.v7m.control[M_REG_NS], ARMCPU), VMSTATE_UINT32(env.v7m.ccr[M_REG_NS], ARMCPU), - VMSTATE_UINT32(env.v7m.cfsr, ARMCPU), + VMSTATE_UINT32(env.v7m.cfsr[M_REG_NS], ARMCPU), VMSTATE_UINT32(env.v7m.hfsr, ARMCPU), VMSTATE_UINT32(env.v7m.dfsr, ARMCPU), VMSTATE_UINT32(env.v7m.mmfar[M_REG_NS], ARMCPU), @@ -273,6 +273,7 @@ static const VMStateDescription vmstate_m_security = { VMSTATE_UINT32(env.v7m.mpu_ctrl[M_REG_S], ARMCPU), VMSTATE_UINT32(env.v7m.ccr[M_REG_S], ARMCPU), VMSTATE_UINT32(env.v7m.mmfar[M_REG_S], ARMCPU), + VMSTATE_UINT32(env.v7m.cfsr[M_REG_S], ARMCPU), VMSTATE_END_OF_LIST() } }; |