diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-11-03 00:03:50 -0400 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-12-15 10:35:26 +0000 |
| commit | 7055fe4baf4d8b331863e51a15e93d3bdea29e36 (patch) | |
| tree | dffae3f23b9b544e17ff2edc57b50d7d6b527376 /target/arm/gdbstub.c | |
| parent | ee03027a2cef00f977a3d28242c0a250b8552495 (diff) | |
target/arm: Assert thumb pc is aligned
Misaligned thumb PC is architecturally impossible.
Assert is better than proceeding, in case we've missed
something somewhere.
Expand a comment about aligning the pc in gdbstub.
Fail an incoming migrate if a thumb pc is misaligned.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/gdbstub.c')
| -rw-r--r-- | target/arm/gdbstub.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 134da0d0ae..ca1de47511 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -77,8 +77,13 @@ int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) tmp = ldl_p(mem_buf); - /* Mask out low bit of PC to workaround gdb bugs. This will probably - cause problems if we ever implement the Jazelle DBX extensions. */ + /* + * Mask out low bits of PC to workaround gdb bugs. + * This avoids an assert in thumb_tr_translate_insn, because it is + * architecturally impossible to misalign the pc. + * This will probably cause problems if we ever implement the + * Jazelle DBX extensions. + */ if (n == 15) { tmp &= ~1; } |