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authorRichard Henderson <richard.henderson@linaro.org>2021-07-25 08:25:21 -1000
committerRichard Henderson <richard.henderson@linaro.org>2021-11-02 07:00:52 -0400
commitfce3f474301a104a0d3a02d7d7b42891dea6338b (patch)
treed09e6060d59b6303491cc515e9194be4732bdfba /accel/tcg
parentaebe51538b90f76a9085dbdeccd87f295316a1dd (diff)
accel/tcg: Report unaligned atomics for user-only
Use the new cpu_loop_exit_sigbus for atomic_mmu_lookup, which has access to complete alignment info from the TCGMemOpIdx arg. Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg')
-rw-r--r--accel/tcg/user-exec.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index c4f69908e9..1ee64f01fc 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -474,11 +474,22 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
MemOpIdx oi, int size, int prot,
uintptr_t retaddr)
{
+ MemOp mop = get_memop(oi);
+ int a_bits = get_alignment_bits(mop);
+ void *ret;
+
+ /* Enforce guest required alignment. */
+ if (unlikely(addr & ((1 << a_bits) - 1))) {
+ MMUAccessType t = prot == PAGE_READ ? MMU_DATA_LOAD : MMU_DATA_STORE;
+ cpu_loop_exit_sigbus(env_cpu(env), addr, t, retaddr);
+ }
+
/* Enforce qemu required alignment. */
if (unlikely(addr & (size - 1))) {
cpu_loop_exit_atomic(env_cpu(env), retaddr);
}
- void *ret = g2h(env_cpu(env), addr);
+
+ ret = g2h(env_cpu(env), addr);
set_helper_retaddr(retaddr);
return ret;
}