summaryrefslogtreecommitdiff
path: root/llvm/lib/Target
AgeCommit message (Expand)Author
2019-01-15AMDGPU: Raise the priority of MAD24 in instruction selection.linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfigChangpeng Fang
2019-01-15X86DAGToDAGISel::matchBitExtract() with truncation (PR36419)Roman Lebedev
2019-01-15[X86] Add versions of the avx512 gather intrinsics that take the mask as a vX...Craig Topper
2019-01-15[MSP430] Recognize '{' as a line separatorAnton Korobeynikov
2019-01-15[Nios2] Remove Nios2 backendCraig Topper
2019-01-15Reapply "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov
2019-01-15[WebAssembly] Fix updating/moving DBG_VALUEs in RegStackifyYury Delendik
2019-01-15[X86] Fix register class for assembly constraints to ST(7). NFCI.Nirav Dave
2019-01-15[X86] Bailout of lowerVectorShuffleAsPermuteAndUnpack for shuffle-with-zero (...Simon Pilgrim
2019-01-15[WebAssembly] Expand SIMD shifts while V8's implementation disagreesThomas Lively
2019-01-15AMDGPU: Add a fast path for icmp.i1(src, false, NE)Marek Olsak
2019-01-15[AArch64] Adjust the feature set for ExynosEvandro Menezes
2019-01-15[X86] Avoid clobbering ESP/RSP in the epilogue.Reid Kleckner
2019-01-15[AArch64] Explicitly use v1i64 type for llvm.aarch64.neon.abs.i64 .Eli Friedman
2019-01-14[AArch64] Add new target feature to fuse arithmetic and logic operationsEvandro Menezes
2019-01-14[X86] Fix unused variable warning in Release builds. NFC.Benjamin Kramer
2019-01-14Revert "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors"Nikita Popov
2019-01-14[WebAssembly][FastISel] Do not assume naive CmpInst loweringThomas Lively
2019-01-14[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectorsNikita Popov
2019-01-14[X86] Silence a -Wparentheses warning on gcc. NFCCraig Topper
2019-01-14[X86][SSSE3] Bailout of lowerVectorShuffleAsPermuteAndUnpack for shuffle-with...Simon Pilgrim
2019-01-14[x86] lower extracted add/sub to horizontal vector mathSanjay Patel
2019-01-14[WebAssembly] Remove old intrinsicsDan Gohman
2019-01-14[mips] Optimize shifts for types larger than GPR size (mips2/mips3)Aleksandar Beserminji
2019-01-14[ARM GlobalISel] Import MOVi32imm into GlobalISelDiana Picus
2019-01-14[AMDGPU] Add support for TFE/LWE in image intrinsics. 2nd tryDavid Stuttard
2019-01-14Replace "no-frame-pointer-*" function attributes with "frame-pointer"Francis Visoiu Mistrih
2019-01-14[MIPS GlobalISel] Add pre legalizer combiner passPetar Avramovic
2019-01-14[X86] Remove mask parameter from avx512 pmultishiftqb intrinsics. Use select ...Craig Topper
2019-01-14[X86] Update type profile for DBPSADBW to indicate the immediate is an i8 not...Craig Topper
2019-01-14[X86] Remove unused intrinsic handlers. NFCCraig Topper
2019-01-14[X86] Remove FPCLASS intrinsic handler. Use INTR_TYPE_2OP instead. NFCCraig Topper
2019-01-14[X86] Remove mask parameter from vpshufbitqmb intrinsics. Change result to a ...Craig Topper
2019-01-13[X86] Add more ISD nodes to handle masked versions of VCVT(T)PD2DQZ128/VCVT(T...Craig Topper
2019-01-13[X86] Add X86ISD::VMFPROUND to handle the masked case of VCVTPD2PSZ128 which ...Craig Topper
2019-01-12[X86] More aggressive shuffle mask widening in combineExtractWithShuffleSimon Pilgrim
2019-01-12[X86] Improve vXi64 ISD::ABS codegen with SSE41+Simon Pilgrim
2019-01-12[X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim
2019-01-12[X86] Remove X86ISD::SELECT as its no longer used by any of our intrinsic low...Craig Topper
2019-01-12[X86] Add ISD node for masked version of CVTPS2PH.Craig Topper
2019-01-12[RISCV] Introduce codegen patterns for RV64M-only instructionsAlex Bradbury
2019-01-12[RISCV] Add patterns for RV64I SLLW/SRLW/SRAW instructionsAlex Bradbury
2019-01-12[X86] Remove unnecessary code from getMaskNode.Craig Topper
2019-01-12[X86] When lowering v1i1/v2i1/v4i1/v8i1 load/store with avx512f, but not avx5...Craig Topper
2019-01-12[X86] Change some patterns that select MOVZX16rm8 to instead select MOVZX32rm...Craig Topper
2019-01-12[ARM] Fix typoEvandro Menezes
2019-01-12[X86] Add ISD nodes for masked truncate so we can properly represent when the...Craig Topper
2019-01-11[AArch64] Improve Exynos predicatesEvandro Menezes
2019-01-11[X86] Fix incomplete handling of register-assigned variables in parsing.Nirav Dave
2019-01-11[AArch64] Add pipeline model for Exynos M4Evandro Menezes