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path: root/llvm/lib/Target/X86/X86InstrFormats.td
AgeCommit message (Expand)Author
2018-06-19[X86] Add the ability to force an EVEX2VEX mapping table entry from the .td f...Craig Topper
2018-06-19[X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have VEX.W=...Craig Topper
2018-06-18[X86] Encode the EVEX2VEX exception list information in .td files instead of ...Craig Topper
2018-06-05[X86] Make all instructions that operate on MMX types, but were added after t...Craig Topper
2018-04-22[X86] Remove OpSizeIgnore, it's not implemented any differently than OpSizeFi...Craig Topper
2018-04-13[X86] Remove remaining itinerary support from instructions and target (PR37093)Simon Pilgrim
2018-04-12[X86] Remove InstrItinClass entries from all x86 instruction defs (PR37093)Simon Pilgrim
2018-04-12[X86] Remove AES/CLMUL/CRC32/LDDQU/MOVNT/POPCNT/SHA schedule itineraries (PR3...Simon Pilgrim
2018-04-12[X86] Remove MMX/3DNow schedule itineraries (PR37093)Simon Pilgrim
2018-04-12[X86] Remove X87 schedule itineraries (PR37093)Simon Pilgrim
2018-04-11[X86] Remove unused itinerary argument from FMA3/FMA4/XOP instructions. NFCI.Simon Pilgrim
2018-04-09[X86][MMX] Fix missing itinerary for MOVQ2DQ instruction formatSimon Pilgrim
2018-04-03[X86] Reduce number of OpPrefix bits in TSFlags to 2. NFCICraig Topper
2018-03-29[X86] Rename RIi64_NOREX tblgen class to just Ii64. Make RIi64 inherit from i...Craig Topper
2018-03-29[X86] Cleanup inheritance of the X86InstrFormats.td classes. NFCCraig Topper
2018-03-24[X86] Merge the Has3DNow0F0FOpcode TSFlag into the OpMap encoding. NFCCraig Topper
2018-03-17[X86] Added support for nocf_check attribute for indirect Branch TrackingOren Ben Simhon
2017-12-23[X86][X87] Wrap FpI_ pseudo to use PseudoI. NFCI.Simon Pilgrim
2017-12-23[X86] Add default InstrItinClass to PseudoISimon Pilgrim
2017-11-25[X86] Add separate intrinsics for scalar FMA4 instructions.Craig Topper
2017-11-21Avoid unecessary opsize byte in segment move to memoryNirav Dave
2017-11-21[x86][icelake]vpclmulqdq introductionCoby Tayree
2017-11-21Revert r318678 to fix Clang testRichard Trieu
2017-11-20[X86] Avoid unecessary opsize byte in segment move to memoryNirav Dave
2017-11-09[X86] Give priority to EVEX FMA instructions over FMA4 instructions.Craig Topper
2017-10-08[X86] Add new attribute to X86 instructions to enable marking them as "not me...Ayman Musa
2017-09-16[X86] Add NoAVX predicates to the patterns for the legacy encoded PCLMUL and ...Craig Topper
2017-05-28[X86] Adding FoldGenRegForm helper field (for memory folding tables tableGen ...Ayman Musa
2017-02-22[AVX-512] Allow legacy scalar min/max intrinsics to select EVEX instructions ...Craig Topper
2017-02-20[X86][AVX] Extend hasVEX_WPrefix bit to accept WIG value (W Ignore) + update ...Ayman Musa
2016-08-22[X86] Create a new instruction format to handle 4VOp3 encoding. This saves on...Craig Topper
2016-08-22[X86] Create a new instruction format to handle MemOp4 encoding. This saves o...Craig Topper
2016-08-22[X86] Space out the encodings of X86 instruction formats. I plan to add some ...Craig Topper
2016-08-22[X86] Merge hasVEX_i8ImmReg into the ImmFormat type which had extra unused en...Craig Topper
2016-08-22[X86] Remove ignoreVEX_L from TSFlags. Only the disassembler needs it and the...Craig Topper
2016-08-02[AVX-512] Correct ExeDomain for many AVX-512 instructions.Craig Topper
2016-02-04AVX-512: Fixed a bug in FMA instruction selection on KNLElena Demikhovsky
2015-06-01AVX-512: added all forms of VPSHUFD and VPSHUFHW, VPSHUFLWElena Demikhovsky
2015-05-21AVX-512: Enabled SSE intrinsics on AVX-512.Elena Demikhovsky
2015-05-07AVX-512: Added all forms of FP compare instructions for KNL and SKX.Elena Demikhovsky
2015-02-15[X86] Add the remaining 11 possible exact ModRM formats. This makes their enc...Craig Topper
2015-02-04[x86] Give movss and movsd execution domains in the x86 backend.Chandler Carruth
2014-12-24[X86] Remove the single AdSize indicator and replace it with separate AdSize1...Craig Topper
2014-12-11[AVX512] Add support for 512b variable bit shift intrinsics.Cameron McInally
2014-12-04[X86] Clean up whitespace as well as minor coding styleMichael Liao
2014-11-14[AVX512] Add 512b masked integer shift by immediate patterns.Cameron McInally
2014-10-15[AVX512] Two new attributes in X86VectorVTInfo for subvector insertAdam Nemet
2014-10-08[AVX512] Refactoring of avx512_binop_rm multiclass through AVX512_masking.Robert Khasanov
2014-08-14[AVX512] Add masking variant for the FMA instructionsAdam Nemet
2014-08-07[AVX512] Generate masking instruction variants with tablegenAdam Nemet
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