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path: root/llvm/lib/Target/X86/X86InstrArithmetic.td
AgeCommit message (Expand)Author
2019-01-02[X86] Remove X86ISD::INC/DEC. Just select them from X86ISD::ADD/SUB at isel timeCraig Topper
2018-12-24[X86] Remove the ANDN check from EmitTest.Craig Topper
2018-12-19[X86] Don't match TESTrr from (cmp (and X, Y), 0) during isel. Defer to post ...Craig Topper
2018-12-12[x86] allow 8-bit adds to be promoted by convertToThreeAddress() to form LEASanjay Patel
2018-10-05[X86] Move ReadAfterLd functionality into X86FoldableSchedWrite (PR36957)Simon Pilgrim
2018-09-24[X86] Split WriteIMul into 8/16/32/64 implementations (PR36931)Simon Pilgrim
2018-09-12[X86] Remove isel patterns for ADCX instructionCraig Topper
2018-09-08[X86] Mark the ADCX and ADOX instruction as commutable.Craig Topper
2018-09-08[X86] Add commuted isel pattern for the load form of ADCX instructions.Craig Topper
2018-09-06[X86] Add RMW ADC patterns with load in operand 1.Craig Topper
2018-09-06[X86] Add isel patterns for commuting X86adc_flag with a load in the LHS.Craig Topper
2018-07-10[X86] Remove AddedComplexity from register form of NOT. NFCICraig Topper
2018-05-17[X86] Split WriteADC/WriteADCRMW scheduler classesSimon Pilgrim
2018-05-08[X86] Split off WriteIMul64 from WriteIMul schedule class (PR36931)Simon Pilgrim
2018-05-08[X86] Split WriteIDiv into div/idiv 8/16/32/64 implementations (PR36930)Simon Pilgrim
2018-04-12[X86] Remove remaining gpr schedule itineraries (PR37093)Simon Pilgrim
2018-04-06[X86] Attempt to model basic arithmetic instructions in the Haswell/Broadwell...Craig Topper
2018-04-04[X86] Use loadi16/loadi32 predicates in multiply patternsCraig Topper
2018-04-01[X86] Cleanup ADCX/ADOX instruction definitions.Craig Topper
2018-04-01[x86] Correct the operand structure of the ADOX instruction.Chandler Carruth
2018-03-20[X86] Fix the SchedRW for memory forms of CMP and TEST.Craig Topper
2018-03-19[X86] Make the multiply and divide itineraries more consistent.Craig Topper
2018-02-12[X86] Change some compare patterns to use loadi8/loadi16/loadi32/loadi64 help...Craig Topper
2018-02-05[X86] Artificially lower the complexity of the scalar ANDN patterns so that A...Craig Topper
2018-01-31[X86] Avoid using high register trick for test instructionAmaury Sechet
2018-01-30Revert "[X86] Avoid using high register trick for test instruction"Eric Liu
2018-01-29[X86] Avoid using high register trick for test instructionAmaury Sechet
2017-12-15[X86] Add 'Requires<[In64BitMode]>' to a bunch of instructions that only have...Craig Topper
2017-10-01[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMemCraig Topper
2017-09-21[X86] Remove unused tablegen class.Craig Topper
2017-09-09[X86] Don't disable slow INC/DEC if optimizing for sizeCraig Topper
2017-08-26[X86] Qualify the RMW INC/DEC patterns with NotSlowIncDec.Craig Topper
2017-05-28[X86] Adding FoldGenRegForm helper field (for memory folding tables tableGen ...Ayman Musa
2017-04-26[X86] Add missing mayLoad/mayStore attributes to some X86 instructions (Conti...Ayman Musa
2016-08-16[x86] Allow merging multiple instances of an immediate within a basic block f...Sanjay Patel
2015-10-11[X86] Fix CMP and TEST with al/ax/eax/rax to not mark EFLAGS as a use or al/a...Craig Topper
2015-08-11[X86] Allow merging of immediates within a basic block for code size savingsMichael Kuperstein
2015-03-31Fix the operand encoding in the test instruction.Rafael Espindola
2015-01-08[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LE...Craig Topper
2015-01-06[X86] Make isel select the 2-byte register form of INC/DEC even in non-64-bit...Craig Topper
2015-01-05[X86] Remove the predicates from the register forms of the 2-byte inc and dec...Craig Topper
2014-12-29[X86] Fix some cases where some 8-bit instructions were marked as being conve...Craig Topper
2014-12-29[X86] Add the 0x82 instructions to the disassebmler. They are identical in fu...Craig Topper
2014-12-29[x86] Refactor some tablegen instruction info classes slightly to prepare for...Craig Topper
2014-12-29[x86] Remove unused classes from tablegen instruction info.Craig Topper
2014-12-18[X86] Remove unnecessary 'In64BitMode' predicate for instructions that alread...Craig Topper
2014-12-04[X86] Clean up whitespace as well as minor coding styleMichael Liao
2014-11-26Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.Craig Topper
2014-08-21[x86] Broadwell: ADOX/ADCX. Added _addcarryx_u{32|64} intrinsics to LLVM.Robert Khasanov
2014-07-10[X86] Mark pseudo instruction TEST8ri_NOEREX as hasSIdeEffects=0.Akira Hatanaka
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