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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
AgeCommit message (Expand)Author
2019-01-15[X86] Bailout of lowerVectorShuffleAsPermuteAndUnpack for shuffle-with-zero (...Simon Pilgrim
2019-01-14[X86] Fix unused variable warning in Release builds. NFC.Benjamin Kramer
2019-01-14[X86] Silence a -Wparentheses warning on gcc. NFCCraig Topper
2019-01-14[X86][SSSE3] Bailout of lowerVectorShuffleAsPermuteAndUnpack for shuffle-with...Simon Pilgrim
2019-01-14[x86] lower extracted add/sub to horizontal vector mathSanjay Patel
2019-01-14[X86] Remove unused intrinsic handlers. NFCCraig Topper
2019-01-14[X86] Remove FPCLASS intrinsic handler. Use INTR_TYPE_2OP instead. NFCCraig Topper
2019-01-14[X86] Remove mask parameter from vpshufbitqmb intrinsics. Change result to a ...Craig Topper
2019-01-13[X86] Add more ISD nodes to handle masked versions of VCVT(T)PD2DQZ128/VCVT(T...Craig Topper
2019-01-13[X86] Add X86ISD::VMFPROUND to handle the masked case of VCVTPD2PSZ128 which ...Craig Topper
2019-01-12[X86] More aggressive shuffle mask widening in combineExtractWithShuffleSimon Pilgrim
2019-01-12[X86] Improve vXi64 ISD::ABS codegen with SSE41+Simon Pilgrim
2019-01-12[X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim
2019-01-12[X86] Remove X86ISD::SELECT as its no longer used by any of our intrinsic low...Craig Topper
2019-01-12[X86] Add ISD node for masked version of CVTPS2PH.Craig Topper
2019-01-12[X86] Remove unnecessary code from getMaskNode.Craig Topper
2019-01-12[X86] When lowering v1i1/v2i1/v4i1/v8i1 load/store with avx512f, but not avx5...Craig Topper
2019-01-12[X86] Add ISD nodes for masked truncate so we can properly represent when the...Craig Topper
2019-01-11[x86] allow insert/extract when matching horizontal opsSanjay Patel
2019-01-11[X86] Change vXi1 extract_vector_elt lowering to be legal if the index is 0. ...Craig Topper
2019-01-10[X86] Call SimplifyDemandedBits on conditions of X86ISD::SHRUNKBLENDCraig Topper
2019-01-10[X86] Simplify the BRCOND handling for FCMP_UNE.Craig Topper
2019-01-10[x86] fix remaining miscompile bug in horizontal binop matching (PR40243)Sanjay Patel
2019-01-10[x86] fix horizontal binop matching for 256-bit vectors (PR40243)Sanjay Patel
2019-01-10[X86] After turning VSELECT into SHRUNKBLEND, make we push the VSELECT into t...Craig Topper
2019-01-09[X86] Enable combining shuffles to PACKSS/PACKUS for 256/512-bit vectorsSimon Pilgrim
2019-01-09[X86] Correct the MaskVT for avx512 gather/scatter intrinsics to use the min ...Craig Topper
2019-01-06[X86] Add support for matching vector funnel shift to AVX512VBMI2 instructions.Craig Topper
2019-01-05[X86] Use two pmovmskbs in combineBitcastvxi1 for (i64 (bitcast (v64i1 (trunc...Craig Topper
2019-01-05[X86] Allow combinevxi1Bitcast to use pmovmskb on avx512 targets if the input...Craig Topper
2019-01-05[X86] Allow LowerTRUNCATE to use PACKUS/PACKSS for v16i16->v16i8 truncate whe...Craig Topper
2019-01-04[X86] Fix warning; NFCNikita Popov
2019-01-04[x86] lower extracted fadd/fsub to horizontal vector math; 2nd trySanjay Patel
2019-01-04[X86] Add VPSLLI/VPSRLI ((X >>u C1) << C2) SimplifyDemandedBits combineSimon Pilgrim
2019-01-04revert r350369: [x86] lower extracted fadd/fsub to horizontal vector mathSanjay Patel
2019-01-03[x86] lower extracted fadd/fsub to horizontal vector mathSanjay Patel
2019-01-03[DAGCombiner][x86] scalarize binop followed by extractelementSanjay Patel
2019-01-02[X86] Remove X86ISD::INC/DEC. Just select them from X86ISD::ADD/SUB at isel timeCraig Topper
2019-01-02[X86] Support SHLD/SHRD masked shift-counts (PR34641)Simon Pilgrim
2019-01-02[X86] Remove the separate SMUL8/UMUL8 X86ISD opcodes by merging with SMUL/UMU...Craig Topper
2019-01-02[X86] Allow LowerSELECT and LowerBRCOND to directly lower i8 UMULO/SMULO.Craig Topper
2019-01-01[X86] Factor the core code out of LowerXALUO into a helper function. Use it i...Craig Topper
2019-01-01[x86] move/rename helper for horizontal op codegen; NFCSanjay Patel
2018-12-31[X86] Add X86ISD::VSRAI to computeKnownBitsForTargetNode.Craig Topper
2018-12-30[X86] Don't mark SEXTLOAD from v4i8/v4i16/v8i8 as Custom on pre-sse4.1.Craig Topper
2018-12-30[X86] Add custom type legalization for SIGN_EXTEND_VECTOR_INREG from 16i16/v3...Craig Topper
2018-12-29[X86] Don't mark SEXTLOAD v4i8->v4i64 and v8i8->v8i64 as custom under vector ...Craig Topper
2018-12-28[X86] Directly emit X86ISD::PMULUDQ from the ReplaceNodeResults handling of v...Craig Topper
2018-12-27[X86] Remove check that avoids creating PMULDQ with illegal types. Rely on Sp...Craig Topper
2018-12-27[X86] Factor the core code out of LowerSETCC into a helper that can create CM...Craig Topper
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