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author | Amjad Aboud <amjad.aboud@intel.com> | 2017-07-16 17:39:56 +0000 |
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committer | Amjad Aboud <amjad.aboud@intel.com> | 2017-07-16 17:39:56 +0000 |
commit | cd5a2d8a585bdd369e41da96bcb73a4dd92dfe57 (patch) | |
tree | 822a272c8d44044781f490962627674b85493e11 /llvm/lib/Target/X86/X86TargetMachine.cpp | |
parent | 2a5eab3984c2164b0ac1155a0912dd122ae8d887 (diff) |
[X86] X86::CMOV to Branch heuristic based optimization.
LLVM compiler recognizes opportunities to transform a branch into IR select instruction(s) - later it will be lowered into X86::CMOV instruction, assuming no other optimization eliminated the SelectInst.
However, it is not always profitable to emit X86::CMOV instruction. For example, branch is preferable over an X86::CMOV instruction when:
1. Branch is well predicted
2. Condition operand is expensive, compared to True-value and the False-value operands
In CodeGenPrepare pass there is a shallow optimization that tries to convert SelectInst into branch, but it is not enough.
This commit, implements machine optimization pass that converts X86::CMOV instruction(s) into branch, based on a conservative heuristic.
Differential Revision: https://reviews.llvm.org/D34769
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86TargetMachine.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 8d891c983fa..08c2cdaefe7 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -375,6 +375,7 @@ bool X86PassConfig::addILPOpts() { addPass(&EarlyIfConverterID); if (EnableMachineCombinerPass) addPass(&MachineCombinerID); + addPass(createX86CmovConverterPass()); return true; } |