diff options
author | Craig Topper <craig.topper@intel.com> | 2018-01-20 00:26:08 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-01-20 00:26:08 +0000 |
commit | 122eea09ada8cbe06bf371083077dbaf6ec328c5 (patch) | |
tree | 90900ed3cbc335b3fba73e86cb6ba9cd95c5531d /llvm/lib/Target/X86/X86TargetMachine.cpp | |
parent | 40d3be0897457110039b219d04f99c202d5a42c3 (diff) |
[X86] Add support for passing 'prefer-vector-width' function attribute into X86Subtarget and exposing via X86's getRegisterWidth TTI interface.
This will cause the vectorizers to do some limiting of the vector widths they create. This is not a strict limit. There are reasons I know of that the loop vectorizer will generate larger vectors for.
I've written this in such a way that the interface will only return a properly supported width(0/128/256/512) even if the attribute says something funny like 384 or 10.
This has been split from D41895 with the remainder in a follow up commit.
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86TargetMachine.cpp | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 48e2073c41c..b3bf9269f73 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -255,7 +255,24 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const { if (SoftFloat) Key += FS.empty() ? "+soft-float" : ",+soft-float"; - FS = Key.substr(CPU.size()); + // Keep track of the key width after all features are added so we can extract + // the feature string out later. + unsigned CPUFSWidth = Key.size(); + + // Translate vector width function attribute into subtarget features. This + // overrides any CPU specific turning parameter + unsigned PreferVectorWidthOverride = 0; + if (F.hasFnAttribute("prefer-vector-width")) { + StringRef Val = F.getFnAttribute("prefer-vector-width").getValueAsString(); + unsigned Width; + if (!Val.getAsInteger(0, Width)) { + Key += ",prefer-vector-width="; + Key += Val; + PreferVectorWidthOverride = Width; + } + } + + FS = Key.slice(CPU.size(), CPUFSWidth); auto &I = SubtargetMap[Key]; if (!I) { @@ -264,7 +281,8 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const { // function that reside in TargetOptions. resetTargetOptions(F); I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this, - Options.StackAlignmentOverride); + Options.StackAlignmentOverride, + PreferVectorWidthOverride); } return I.get(); } |