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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-05-24 14:54:32 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-05-24 14:54:32 +0000
commitd122745be51ee0d53f8f94543722ee0e77d11f3e (patch)
treeb0339a82acea76de8838ef1aac8829d820f9b111 /llvm/lib/Target/X86/X86PfmCounters.td
parentb90309aa9dcfd5426c088c45b17a5e72ea026615 (diff)
[X86][BtVer2] Added Jaguar cpu cycle counter to permit llvm-exegesis latency testing
Ideally we'd be able to test a CPU by using __builtin_readcyclecounter()/RDTSC instead (PR37193) if a model/cycle-counter is not specified. NOTE: Jaguar PMCs don't give good coverage of resource pipes specified in the model (at the macro-vs-micro-op levels) but we should be able to cover at least a few resources.
Diffstat (limited to 'llvm/lib/Target/X86/X86PfmCounters.td')
-rw-r--r--llvm/lib/Target/X86/X86PfmCounters.td4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86PfmCounters.td b/llvm/lib/Target/X86/X86PfmCounters.td
index d67ae509093..7191e30c43d 100644
--- a/llvm/lib/Target/X86/X86PfmCounters.td
+++ b/llvm/lib/Target/X86/X86PfmCounters.td
@@ -69,3 +69,7 @@ def SKXPort5Counter : PfmIssueCounter<SKXPort5, ["uops_dispatched_port:port_5"]>
def SKXPort6Counter : PfmIssueCounter<SKXPort6, ["uops_dispatched_port:port_6"]>;
def SKXPort7Counter : PfmIssueCounter<SKXPort7, ["uops_dispatched_port:port_7"]>;
}
+
+let SchedModel = BtVer2Model in {
+def JCycleCounter : PfmCycleCounter<"cpu_clk_unhalted">;
+}