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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-09 13:27:47 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-09 13:27:47 +0000 |
| commit | f64fa5f9fd827a57145ad796c9935407d114ab33 (patch) | |
| tree | 056f4737bce6e070ae805426105b958b9cf8240f /llvm/lib/Target/X86/X86InstrMMX.td | |
| parent | 7c7241e39febbff6b11f689c228ca819aae7b565 (diff) | |
[X86][MMX] Fix missing itinerary for CVTPI2PS
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrMMX.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrMMX.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index 52d76f01d26..29814757e6c 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -206,15 +206,15 @@ multiclass sse12_cvt_pint<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC, multiclass sse12_cvt_pint_3addr<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC, Intrinsic Int, X86MemOperand x86memop, - PatFrag ld_frag, string asm, Domain d> { + PatFrag ld_frag, string asm, OpndItins itins, Domain d> { def irr : MMXPI<opc, MRMSrcReg, (outs DstRC:$dst), (ins DstRC:$src1, SrcRC:$src2), asm, [(set DstRC:$dst, (Int DstRC:$src1, SrcRC:$src2))], - NoItinerary, d>, Sched<[WriteCvtI2F]>; + itins.rr, d>, Sched<[WriteCvtI2F]>; def irm : MMXPI<opc, MRMSrcMem, (outs DstRC:$dst), (ins DstRC:$src1, x86memop:$src2), asm, [(set DstRC:$dst, (Int DstRC:$src1, (ld_frag addr:$src2)))], - NoItinerary, d>, Sched<[WriteCvtI2FLd]>; + itins.rm, d>, Sched<[WriteCvtI2FLd]>; } //===----------------------------------------------------------------------===// @@ -596,7 +596,7 @@ let Constraints = "$src1 = $dst" in { defm MMX_CVTPI2PS : sse12_cvt_pint_3addr<0x2A, VR64, VR128, int_x86_sse_cvtpi2ps, i64mem, load, "cvtpi2ps\t{$src2, $dst|$dst, $src2}", - SSEPackedSingle>, PS; + MMX_CVT_PS_ITINS, SSEPackedSingle>, PS; } // Extract / Insert |