diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-04 18:16:13 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-04 18:16:13 +0000 |
| commit | 5f7c0f07f4847bae071282e56c969d0b00edee49 (patch) | |
| tree | f500212a2d4e4b94aaad6c9a10818fa11da06f1d /llvm/lib/Target/X86/X86InstrMMX.td | |
| parent | b3c9432dc3e87fbd5c46c23218959f9f2bff1ad8 (diff) | |
[X86] Add WriteEMMS scheduler class
Filled in the missing values from Btver2 SoG or Agner
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrMMX.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrMMX.td | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index c410ddb4c60..d41641ad158 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -153,8 +153,7 @@ multiclass sse12_cvt_pint_3addr<bits<8> opc, RegisterClass SrcRC, // MMX EMMS Instruction //===----------------------------------------------------------------------===// -// FIXME: Is there a better scheduler class for EMMS/FEMMS? -let SchedRW = [WriteMicrocoded] in +let SchedRW = [WriteEMMS] in def MMX_EMMS : MMXI<0x77, RawFrm, (outs), (ins), "emms", [(int_x86_mmx_emms)]>; //===----------------------------------------------------------------------===// |