diff options
author | Benjamin Kramer <benny.kra@googlemail.com> | 2018-08-21 18:44:25 +0000 |
---|---|---|
committer | Benjamin Kramer <benny.kra@googlemail.com> | 2018-08-21 18:44:25 +0000 |
commit | 3be7ff039bfa10aef192746750ac4d010d5f7572 (patch) | |
tree | 4b0d6fe8bd08d4438b1cee3af6640c5529fa8a0e /llvm/lib/Target/NVPTX | |
parent | 51416d71a7c0b72e378421e7dd37067b0593a816 (diff) |
[NVPTX] Remove ftz variants of cvt with rounding mode
These do not exist in ptxas, it refuses to compile them.
Differential Revision: https://reviews.llvm.org/D51042
Diffstat (limited to 'llvm/lib/Target/NVPTX')
-rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 42 |
1 files changed, 6 insertions, 36 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td index 443b077184c..f0fbe5033fa 100644 --- a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td +++ b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td @@ -2625,32 +2625,20 @@ def : Pat<(f64 (uint_to_fp Int64Regs:$a)), def : Pat<(i1 (fp_to_sint Float16Regs:$a)), (SETP_b16ri (BITCONVERT_16_F2I Float16Regs:$a), 0, CmpEQ)>; def : Pat<(i16 (fp_to_sint Float16Regs:$a)), - (CVT_s16_f16 Float16Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(i16 (fp_to_sint Float16Regs:$a)), (CVT_s16_f16 Float16Regs:$a, CvtRZI)>; def : Pat<(i32 (fp_to_sint Float16Regs:$a)), - (CVT_s32_f16 Float16Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(i32 (fp_to_sint Float16Regs:$a)), (CVT_s32_f16 Float16Regs:$a, CvtRZI)>; def : Pat<(i64 (fp_to_sint Float16Regs:$a)), - (CVT_s64_f16 Float16Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(i64 (fp_to_sint Float16Regs:$a)), (CVT_s64_f16 Float16Regs:$a, CvtRZI)>; // f16 -> uint def : Pat<(i1 (fp_to_uint Float16Regs:$a)), (SETP_b16ri (BITCONVERT_16_F2I Float16Regs:$a), 0, CmpEQ)>; def : Pat<(i16 (fp_to_uint Float16Regs:$a)), - (CVT_u16_f16 Float16Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(i16 (fp_to_uint Float16Regs:$a)), (CVT_u16_f16 Float16Regs:$a, CvtRZI)>; def : Pat<(i32 (fp_to_uint Float16Regs:$a)), - (CVT_u32_f16 Float16Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(i32 (fp_to_uint Float16Regs:$a)), (CVT_u32_f16 Float16Regs:$a, CvtRZI)>; def : Pat<(i64 (fp_to_uint Float16Regs:$a)), - (CVT_u64_f16 Float16Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(i64 (fp_to_uint Float16Regs:$a)), (CVT_u64_f16 Float16Regs:$a, CvtRZI)>; // f32 -> sint @@ -2948,14 +2936,10 @@ def : Pat<(i32 (zext (ctpop Int16Regs:$a))), // fpround f32 -> f16 def : Pat<(f16 (fpround Float32Regs:$a)), - (CVT_f16_f32 Float32Regs:$a, CvtRN_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(f16 (fpround Float32Regs:$a)), (CVT_f16_f32 Float32Regs:$a, CvtRN)>; // fpround f64 -> f16 def : Pat<(f16 (fpround Float64Regs:$a)), - (CVT_f16_f64 Float64Regs:$a, CvtRN_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(f16 (fpround Float64Regs:$a)), (CVT_f16_f64 Float64Regs:$a, CvtRN)>; // fpround f64 -> f32 @@ -2972,8 +2956,6 @@ def : Pat<(f32 (fpextend Float16Regs:$a)), // fpextend f16 -> f64 def : Pat<(f64 (fpextend Float16Regs:$a)), - (CVT_f64_f16 Float16Regs:$a, CvtNONE_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(f64 (fpextend Float16Regs:$a)), (CVT_f64_f16 Float16Regs:$a, CvtNONE)>; // fpextend f32 -> f64 @@ -2988,9 +2970,7 @@ def retflag : SDNode<"NVPTXISD::RET_FLAG", SDTNone, // fceil, ffloor, fround, ftrunc. def : Pat<(fceil Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRPI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(fceil Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRPI)>, Requires<[doNoF32FTZ]>; + (CVT_f16_f16 Float16Regs:$a, CvtRPI)>; def : Pat<(fceil Float32Regs:$a), (CVT_f32_f32 Float32Regs:$a, CvtRPI_FTZ)>, Requires<[doF32FTZ]>; def : Pat<(fceil Float32Regs:$a), @@ -2999,9 +2979,7 @@ def : Pat<(fceil Float64Regs:$a), (CVT_f64_f64 Float64Regs:$a, CvtRPI)>; def : Pat<(ffloor Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRMI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(ffloor Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRMI)>, Requires<[doNoF32FTZ]>; + (CVT_f16_f16 Float16Regs:$a, CvtRMI)>; def : Pat<(ffloor Float32Regs:$a), (CVT_f32_f32 Float32Regs:$a, CvtRMI_FTZ)>, Requires<[doF32FTZ]>; def : Pat<(ffloor Float32Regs:$a), @@ -3009,10 +2987,8 @@ def : Pat<(ffloor Float32Regs:$a), def : Pat<(ffloor Float64Regs:$a), (CVT_f64_f64 Float64Regs:$a, CvtRMI)>; -def : Pat<(fround Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRNI_FTZ)>, Requires<[doF32FTZ]>; def : Pat<(f16 (fround Float16Regs:$a)), - (CVT_f16_f16 Float16Regs:$a, CvtRNI)>, Requires<[doNoF32FTZ]>; + (CVT_f16_f16 Float16Regs:$a, CvtRNI)>; def : Pat<(fround Float32Regs:$a), (CVT_f32_f32 Float32Regs:$a, CvtRNI_FTZ)>, Requires<[doF32FTZ]>; def : Pat<(f32 (fround Float32Regs:$a)), @@ -3021,9 +2997,7 @@ def : Pat<(f64 (fround Float64Regs:$a)), (CVT_f64_f64 Float64Regs:$a, CvtRNI)>; def : Pat<(ftrunc Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(ftrunc Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRZI)>, Requires<[doNoF32FTZ]>; + (CVT_f16_f16 Float16Regs:$a, CvtRZI)>; def : Pat<(ftrunc Float32Regs:$a), (CVT_f32_f32 Float32Regs:$a, CvtRZI_FTZ)>, Requires<[doF32FTZ]>; def : Pat<(ftrunc Float32Regs:$a), @@ -3036,9 +3010,7 @@ def : Pat<(ftrunc Float64Regs:$a), // matches what CUDA's "libm" does. def : Pat<(fnearbyint Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRNI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(fnearbyint Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRNI)>, Requires<[doNoF32FTZ]>; + (CVT_f16_f16 Float16Regs:$a, CvtRNI)>; def : Pat<(fnearbyint Float32Regs:$a), (CVT_f32_f32 Float32Regs:$a, CvtRNI_FTZ)>, Requires<[doF32FTZ]>; def : Pat<(fnearbyint Float32Regs:$a), @@ -3047,9 +3019,7 @@ def : Pat<(fnearbyint Float64Regs:$a), (CVT_f64_f64 Float64Regs:$a, CvtRNI)>; def : Pat<(frint Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRNI_FTZ)>, Requires<[doF32FTZ]>; -def : Pat<(frint Float16Regs:$a), - (CVT_f16_f16 Float16Regs:$a, CvtRNI)>, Requires<[doNoF32FTZ]>; + (CVT_f16_f16 Float16Regs:$a, CvtRNI)>; def : Pat<(frint Float32Regs:$a), (CVT_f32_f32 Float32Regs:$a, CvtRNI_FTZ)>, Requires<[doF32FTZ]>; def : Pat<(frint Float32Regs:$a), |