diff options
author | Benjamin Kramer <benny.kra@googlemail.com> | 2018-08-27 17:29:43 +0000 |
---|---|---|
committer | Benjamin Kramer <benny.kra@googlemail.com> | 2018-08-27 17:29:43 +0000 |
commit | 39d4379ff0c994bbde031173fc7b62b190889119 (patch) | |
tree | c609f15270503a4384bead4b995179c2a8e8d390 /llvm/lib/Target/NVPTX | |
parent | 4d979b2e0d9849b28a3296ff5e63a9ef4f46174a (diff) |
[NVPTX] Implement isLegalToVectorizeLoadChain
This lets LSV nicely split up underaligned chains.
Differential Revision: https://reviews.llvm.org/D51306
Diffstat (limited to 'llvm/lib/Target/NVPTX')
-rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h index a631055d36a..14e93f7447d 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h +++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h @@ -49,6 +49,19 @@ public: return AddressSpace::ADDRESS_SPACE_GENERIC; } + // Loads and stores can be vectorized if the alignment is at least as big as + // the load/store we want to vectorize. + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, + unsigned Alignment, + unsigned AddrSpace) const { + return Alignment >= ChainSizeInBytes; + } + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, + unsigned Alignment, + unsigned AddrSpace) const { + return isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, AddrSpace); + } + // NVPTX has infinite registers of all kinds, but the actual machine doesn't. // We conservatively return 1 here which is just enough to enable the // vectorizers but disables heuristics based on the number of registers. |