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author | Stefan Maksimovic <stefan.maksimovic@mips.com> | 2018-08-16 08:49:50 +0000 |
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committer | Stefan Maksimovic <stefan.maksimovic@mips.com> | 2018-08-16 08:49:50 +0000 |
commit | 8c4678c37d80740d57a181a04c29d12b8af98ce8 (patch) | |
tree | a4ff5766b94bc4ffcc94d22bb7efc75102c6384f /libunwind | |
parent | fb2431485f7d0147951077aebd9b9b0c60864bb8 (diff) |
[libunwind][mips] Guard accumulator registers
Mipsr6 does not possess HI and LO accumulator registers, adjust validRegister functions to respect that.
Differential Revision: https://reviews.llvm.org/D50244
Diffstat (limited to 'libunwind')
-rw-r--r-- | libunwind/src/Registers.hpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/libunwind/src/Registers.hpp b/libunwind/src/Registers.hpp index b20664a48de..63a50d42764 100644 --- a/libunwind/src/Registers.hpp +++ b/libunwind/src/Registers.hpp @@ -2759,10 +2759,12 @@ inline bool Registers_mips_o32::validRegister(int regNum) const { return false; if (regNum <= UNW_MIPS_R31) return true; +#if __mips_isa_rev != 6 if (regNum == UNW_MIPS_HI) return true; if (regNum == UNW_MIPS_LO) return true; +#endif #if defined(__mips_hard_float) && __mips_fpr == 32 if (regNum >= UNW_MIPS_F0 && regNum <= UNW_MIPS_F31) return true; @@ -3073,10 +3075,12 @@ inline bool Registers_mips_newabi::validRegister(int regNum) const { return false; if (regNum <= UNW_MIPS_R31) return true; +#if __mips_isa_rev != 6 if (regNum == UNW_MIPS_HI) return true; if (regNum == UNW_MIPS_LO) return true; +#endif // FIXME: Hard float, DSP accumulator registers, MSA registers return false; } |