diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-07-12 07:30:01 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-07-12 07:30:01 +0000 |
| commit | e4eedb404fcd2847d445b71492eeccb4eba93728 (patch) | |
| tree | 51d9b9f3e7af38237e70272d002c818bf976b5c2 | |
| parent | bc1a76853fb5aaee73faf3fe0beb4f4ab6053eb8 (diff) | |
[X86] Remove i128 type from FR128 regclass.
i128 isn't a legal type in our x86 implementation today. So remove this and the few patterns that used it until it becomes necessary.
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 15 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrVecCompiler.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterInfo.td | 2 |
3 files changed, 1 insertions, 18 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index d2a0412f528..69f71295300 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -8117,11 +8117,6 @@ def : Pat<(X86fand FR128:$src1, FR128:$src2), (ANDPSrr (COPY_TO_REGCLASS FR128:$src1, VR128), (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>; -def : Pat<(and FR128:$src1, FR128:$src2), - (COPY_TO_REGCLASS - (ANDPSrr (COPY_TO_REGCLASS FR128:$src1, VR128), - (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>; - def : Pat<(X86for FR128:$src1, (memopf128 addr:$src2)), (COPY_TO_REGCLASS (ORPSrm (COPY_TO_REGCLASS FR128:$src1, VR128), f128mem:$src2), @@ -8132,11 +8127,6 @@ def : Pat<(X86for FR128:$src1, FR128:$src2), (ORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128), (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>; -def : Pat<(or FR128:$src1, FR128:$src2), - (COPY_TO_REGCLASS - (ORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128), - (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>; - def : Pat<(X86fxor FR128:$src1, (memopf128 addr:$src2)), (COPY_TO_REGCLASS (XORPSrm (COPY_TO_REGCLASS FR128:$src1, VR128), f128mem:$src2), @@ -8147,11 +8137,6 @@ def : Pat<(X86fxor FR128:$src1, FR128:$src2), (XORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128), (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>; -def : Pat<(xor FR128:$src1, FR128:$src2), - (COPY_TO_REGCLASS - (XORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128), - (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>; - //===----------------------------------------------------------------------===// // GFNI instructions //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/X86/X86InstrVecCompiler.td b/llvm/lib/Target/X86/X86InstrVecCompiler.td index d83165150cb..ae36391fa35 100644 --- a/llvm/lib/Target/X86/X86InstrVecCompiler.td +++ b/llvm/lib/Target/X86/X86InstrVecCompiler.td @@ -48,8 +48,6 @@ def : Pat<(v2f64 (bitconvert (v4i32 VR128:$src))), (v2f64 VR128:$src)>; def : Pat<(v2f64 (bitconvert (v8i16 VR128:$src))), (v2f64 VR128:$src)>; def : Pat<(v2f64 (bitconvert (v16i8 VR128:$src))), (v2f64 VR128:$src)>; def : Pat<(v2f64 (bitconvert (v4f32 VR128:$src))), (v2f64 VR128:$src)>; -def : Pat<(f128 (bitconvert (i128 FR128:$src))), (f128 FR128:$src)>; -def : Pat<(i128 (bitconvert (f128 FR128:$src))), (i128 FR128:$src)>; // Bitcasts between 256-bit vector types. Return the original type since // no instruction is needed for the conversion diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td index a462e6a877b..b17b3d89cd7 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.td +++ b/llvm/lib/Target/X86/X86RegisterInfo.td @@ -504,7 +504,7 @@ def FR32 : RegisterClass<"X86", [f32], 32, (sequence "XMM%u", 0, 15)>; def FR64 : RegisterClass<"X86", [f64], 64, (add FR32)>; -def FR128 : RegisterClass<"X86", [i128, f128], 128, (add FR32)>; +def FR128 : RegisterClass<"X86", [f128], 128, (add FR32)>; // FIXME: This sets up the floating point register files as though they are f64 |