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-rw-r--r--gcc/config/rs6000/predicates.md46
1 files changed, 23 insertions, 23 deletions
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 63af03baa6f..237b4323b4c 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -622,17 +622,17 @@
switch (mode)
{
- case KFmode:
- case IFmode:
- case TFmode:
- case DFmode:
- case SFmode:
+ case E_KFmode:
+ case E_IFmode:
+ case E_TFmode:
+ case E_DFmode:
+ case E_SFmode:
return 0;
- case DImode:
+ case E_DImode:
return (num_insns_constant (op, DImode) <= 2);
- case SImode:
+ case E_SImode:
return 1;
default:
@@ -1834,12 +1834,12 @@
switch (mode)
{
- case QImode:
- case HImode:
- case SImode:
+ case E_QImode:
+ case E_HImode:
+ case E_SImode:
break;
- case DImode:
+ case E_DImode:
if (!TARGET_POWERPC64)
return 0;
break;
@@ -1894,20 +1894,20 @@
switch (mode)
{
- case QImode:
- case HImode:
- case SImode:
+ case E_QImode:
+ case E_HImode:
+ case E_SImode:
break;
/* Do not fuse 64-bit DImode in 32-bit since it splits into two
separate instructions. */
- case DImode:
+ case E_DImode:
if (!TARGET_POWERPC64)
return 0;
break;
/* ISA 2.08/power8 only had fusion of GPR loads. */
- case SFmode:
+ case E_SFmode:
if (!TARGET_P9_FUSION)
return 0;
break;
@@ -1915,7 +1915,7 @@
/* ISA 2.08/power8 only had fusion of GPR loads. Do not allow 64-bit
DFmode in 32-bit if -msoft-float since it splits into two separate
instructions. */
- case DFmode:
+ case E_DFmode:
if ((!TARGET_POWERPC64 && !TARGET_DF_FPR) || !TARGET_P9_FUSION)
return 0;
break;
@@ -1959,15 +1959,15 @@
switch (mode)
{
- case QImode:
- case HImode:
- case SImode:
- case SFmode:
+ case E_QImode:
+ case E_HImode:
+ case E_SImode:
+ case E_SFmode:
break;
/* Do not fuse 64-bit DImode in 32-bit since it splits into two
separate instructions. */
- case DImode:
+ case E_DImode:
if (!TARGET_POWERPC64)
return 0;
break;
@@ -1975,7 +1975,7 @@
/* Do not allow 64-bit DFmode in 32-bit if -msoft-float since it splits
into two separate instructions. Do allow fusion if we have hardware
floating point. */
- case DFmode:
+ case E_DFmode:
if (!TARGET_POWERPC64 && !TARGET_DF_FPR)
return 0;
break;