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authorMichael Meissner <meissner@linux.ibm.com>2022-07-14 11:16:08 -0400
committerMichael Meissner <meissner@linux.ibm.com>2022-07-14 11:16:08 -0400
commit22736f3d0d4fb8ce4afb3230023f8accdb03a623 (patch)
tree6e65f968dcdf2843018b85fd14d427e965e25cc6 /gcc
parent0380d008b1474373852fd2fc921886491304f854 (diff)
[BACKPORT] Disable generating load/store vector pairs for block copies.
Testing has found that using load and store vector pair for block copies can result in a slow down on power10. This patch disables using the vector pair instructions for block copies if we are tuning for power10. 2022-06-11 Michael Meissner <meissner@linux.ibm.com> gcc/ * config/rs6000/rs6000.cc (rs6000_option_override_internal): Do not generate block copies with vector pair instructions if we are tuning for power10. Back port from master branch.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/rs6000/rs6000.cc5
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 4030864aa1a..040487bd277 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4151,7 +4151,10 @@ rs6000_option_override_internal (bool global_init_p)
if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_VECTOR_PAIR))
{
- if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX)
+ /* Do not generate lxvp and stxvp on power10 since there are some
+ performance issues. */
+ if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX
+ && rs6000_tune != PROCESSOR_POWER10)
rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
else
rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;