diff options
| author | chenglulu <chenglulu@loongson.cn> | 2021-11-27 15:07:31 +0800 |
|---|---|---|
| committer | Chenghua Xu <paul.hua.gm@gmail.com> | 2022-03-29 17:43:36 +0800 |
| commit | 4ae54e8dec3a3593ff5689754b58324501ecfdcc (patch) | |
| tree | ef435a330c65b6e7c22ece253ac3d2fa78bf5221 /gcc/testsuite/lib | |
| parent | 34024b715068801ddf4e1a95223f9ff31f63a802 (diff) | |
LoongArch Port: gcc/testsuite
2022-03-29 Chenghua Xu <xuchenghua@loongson.cn>
Lulu Cheng <chenglulu@loongson.cn>
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-rom.C: Add build options for LoongArch.
* g++.old-deja/g++.abi/ptrmem.C: Add LoongArch support.
* g++.old-deja/g++.pt/ptrmem6.C: xfail for LoongArch.
* gcc.dg/20020312-2.c: Add LoongArch support.
* c-c++-common/zero-scratch-regs-10.c: Like wise
* c-c++-common/zero-scratch-regs-11.c: Like wise
* c-c++-common/zero-scratch-regs-8.c: Like wise
* c-c++-common/zero-scratch-regs-9.c: Like wise
* gcc.dg/loop-8.c: Skip on LoongArch.
* gcc.dg/torture/stackalign/builtin-apply-2.c: Likewise.
* gcc.dg/tree-ssa/ssa-fre-3.c: Likewise.
* go.test/go-test.exp: Define the LoongArch target.
* lib/target-supports.exp: Like wise.
* gcc.target/loongarch/loongarch.exp: New file.
* gcc.target/loongarch/tst-asm-const.c: Like wise.
* gcc.target/loongarch/larch-builtin.c: Like wise.
Diffstat (limited to 'gcc/testsuite/lib')
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 737e1a8913b..a1aef0e0a16 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1297,6 +1297,14 @@ proc check_effective_target_mpaired_single { } { # Return true if the target has access to FPU instructions. proc check_effective_target_hard_float { } { + if { [istarget loongarch*-*-*] } { + return [check_no_compiler_messages hard_float assembly { + #if (defined __loongarch_soft_float) + #error __loongarch_soft_float + #endif + }] + } + if { [istarget mips*-*-*] } { return [check_no_compiler_messages hard_float assembly { #if (defined __mips_soft_float || defined __mips16) @@ -8616,6 +8624,7 @@ proc check_effective_target_sync_char_short { } { || [istarget cris-*-*] || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9]) || ([istarget arc*-*-*] && [check_effective_target_arc_atomic]) + || [istarget loongarch*-*-*] || [check_effective_target_mips_llsc] }}] } @@ -10708,6 +10717,7 @@ proc check_effective_target_branch_cost {} { || [istarget epiphany*-*-*] || [istarget frv*-*-*] || [istarget i?86-*-*] || [istarget x86_64-*-*] + || [istarget loongarch*-*-*] || [istarget mips*-*-*] || [istarget s390*-*-*] || [istarget riscv*-*-*] |