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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2022-05-14 00:20:09 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2022-05-14 00:20:09 +0000 |
| commit | 52991af6ff86aa492eb536951df7a393ddc86349 (patch) | |
| tree | 8d719284d22a450fdc7245bb2aac02bde4f9be51 /gcc/ChangeLog | |
| parent | 0b9bdcf6857b48bb7a147a9778963c942ecb2dd9 (diff) | |
Daily bump.
Diffstat (limited to 'gcc/ChangeLog')
| -rw-r--r-- | gcc/ChangeLog | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index effb583864f..2ba35406034 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2022-05-13 Eric Botcazou <ebotcazou@adacore.com> + + * tree-sra.cc (sra_modify_assign): Check that scalar storage order + is the same on the LHS and RHS before rewriting one with the model + of the other. + +2022-05-13 Alexandre Oliva <oliva@adacore.com> + + Backported from master: + 2022-05-13 Alexandre Oliva <oliva@adacore.com> + + PR rtl-optimization/105455 + * gimple-harden-conditionals.cc (insert_check_and_trap): Set + probabilities for newly-conditional edges. + 2022-05-11 Martin Jambor <mjambor@suse.cz> Backported from master: |