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2022-08-05gas: fix a testcase broken by new ZSTD supportTsukasa OI
The commit 1369522f36eece1b37139a81f7f2139ba3915172 ("Recognize the new ELF compression type for ZSTD.") added the new ELF compression type but it accidentally broke a GAS testcase. Since testing for the section type "2048" (SHF_COMPRESSED) is not going to be portable in the long term, it now tests SHF_LINK_ORDER ("128") instead. Using SHF_LINK_ORDER (with possibly sh_link == 0) is an idea by Jan Beulich. gas/ChangeLog: * testsuite/gas/elf/section10.s: Use SHF_LINK_ORDER to test mixed numeric and alpha values. * testsuite/gas/elf/section10.d: Reflect the change above.
2022-08-05When gas/read.c calls mbstowcs with a NULL destination, it should set size to 0Nick Clifton
PR 29447 * read.c (read_symbol_name): Pass 0 as the length parameter when invoking mbstowc in order to check the validity of a wide string.
2022-08-04Don't use BFD_VMA_FMT in binutilsAlan Modra
BFD_VMA_FMT can't be used in format strings that need to be translated, because the translation won't work when the type of bfd_vma differs from the machine used to compile .pot files. We've known about this for a long time, but patches slip through review. So just get rid of BFD_VMA_FMT, instead using the appropriate PRId64, PRIu64, PRIx64 or PRIo64 and SCN variants for scanf. The patch is mostly mechanical, the only thing requiring any thought is casts needed to preserve PRId64 output from bfd_vma values, or to preserve one of the unsigned output formats from bfd_signed_vma values.
2022-08-03x86: improve/shorten vector zeroing-idiom optimization conditionalJan Beulich
- Drop the rounding type check: We're past template matching, and none of the involved insns support embedded rounding. - Drop the extension opcode check: None of the involved opcodes have variants with it being other than None. - Instead check opcode space, even if just to be on the safe side going forward. - Reduce the number of comparisons by folding two groups.
2022-08-03x86: also use D for MOVBEJan Beulich
First of all rename the meanwhile misleading Opcode_SIMD_FloatD, as it has also been used for KMOV* and BNDMOV. Then simplify the condition selecting which form if "reversing" to use - except for the MOV to/from control/debug/test registers all extended opcode space insns use bit 0 (rather than bit 1) to indicate the direction (from/to memory) of an operation. With that, D can simply be set on the first of the two templates, while the other can be dropped.
2022-08-02arm: Add cfi expression support for ra_auth_codeVictor Do Nascimento
This patch extends assembler support for the use of register names to allow for pseudo-registers, e.g. ra_auth_code register. This is done particularly with CFI directives in mind, allowing for expressions of the type: .cfi_register ra_auth_code, 12 gas/Changelog: * config/tc-arm.c (tc_arm_regname_to_dw2regnum): Add REG_TYPE_PSEUDO handling. * testsuite/gas/arm/cfi-pacbti-m-readelf.d: New. * testsuite/gas/arm/cfi-pacbti-m.s: New.
2022-08-02arm: Use DWARF numbering convention for pseudo-register representationVictor Do Nascimento
This patch modifies the internal `struct reg_entry' numbering of DWARF pseudo-registers to match values assigned in DWARF standards (see "4.1 DWARF register names" in [1])so ra_auth_code goes from 12 to 143 and amends the unwinder .save directive-processing code to correctly handle mixed register-type save directives. The mechanism for splitting the register list is also re-written to comply with register ordering on push statements, being that registers are stored on the stack in numerical order, with the lowest numbered register at the lowest address [2]. Consequently, the parsing of the hypothetical directive .save{r4-r7, r10, ra_auth_core, lr} has been changed such as rather than producing .save{r4-r7, r10} .save{ra_auth_code} .save{lr} as was the case with previous implementation, now produces: .save{lr} .save{ra_auth_code} .save{r4-r7, r10} [1] <https://github.com/ARM-software/abi-aa/blob/main/aadwarf32/aadwarf32.rst> [2] <https://developer.arm.com/documentation/dui0473/j/arm-and-thumb-instructions/push> gas/Changelog: * config/tc-arm.c (REG_RA_AUTH_CODE): New. (parse_dot_save): Likewise. (parse_reg_list): Remove obsolete code. (reg_names): Set ra_auth_code to 143. (s_arm_unwind_save): Handle core and pseudo-register lists via parse_dot_save. (s_arm_unwind_save_mixed): Deleted. (s_arm_unwind_save_pseudo): Handle one register at a time. * testsuite/gas/arm/unwind-pacbti-m-readelf.d: Fix test. * testsuite/gas/arm/unwind-pacbti-m.d: Likewise.
2022-08-01x86: SKINIT with operand needs IgnoreSizeJan Beulich
Without it in 16-bit mode a pointless operand size prefix would be emitted.
2022-08-01opcodes: LoongArch: add "ret" instruction to reduce typingWANG Xuerui
This syntactic sugar is present in both classical and emerging architectures, like Alpha, SPARC and RISC-V, and assembler macros doing the same thing can already be found in the wild e.g. [1], proving the feature's popularity. It's better to provide support directly in the assembler so downstream users wouldn't have to re-invent this over and over again. [1]: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/loongarch/sysdep.h;h=c586df819cd90;hb=HEAD#l28
2022-08-01opcodes: LoongArch: make all non-native jumps desugar to canonical ↵WANG Xuerui
b{lt/ge}[u] forms Also re-order the jump/branch opcodes while at it, so that insns are sorted in ascending order according to opcodes, and the label form preceding the real definition.
2022-08-01Get rid of fprintf_vma and sprintf_vmaAlan Modra
These two macros print either a 16 digit hex number or an 8 digit hex number. Unfortunately they depend on both target and host, which means that the output for 32-bit targets may be either 8 or 16 hex digits. Replace them in most cases with code that prints a bfd_vma using PRIx64. In some cases, deliberately lose the leading zeros. This change some output, notably in base/offset fields of m68k disassembly which I think looks better that way, and in error messages. I've kept leading zeros in symbol dumps (objdump -t) and in PE header dumps. bfd/ * bfd-in.h (fprintf_vma, sprintf_vma, printf_vma): Delete. * bfd-in2.h: Regenerate. * bfd.c (bfd_sprintf_vma): Don't use sprintf_vma. (bfd_fprintf_vma): Don't use fprintf_vma. * coff-rs6000.c (xcoff_reloc_type_tls): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. (xcoff_ppc_relocate_section): Likewise. * cofflink.c (_bfd_coff_write_global_sym): Likewise. * mmo.c (mmo_write_symbols_and_terminator): Likewise. * srec.c (srec_write_symbols): Likewise. * elf32-xtensa.c (print_r_reloc): Similarly for fprintf_vma. * pei-x86_64.c (pex64_dump_xdata): Likewise. (pex64_bfd_print_pdata_section): Likewise. * som.c (som_print_symbol): Likewise. * ecoff.c (_bfd_ecoff_print_symbol): Use bfd_fprintf_vma. opcodes/ * dis-buf.c (perror_memory, generic_print_address): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. * i386-dis.c (print_operand_value, print_displacement): Likewise. * m68k-dis.c (print_base, print_indexed): Likewise. * ns32k-dis.c (print_insn_arg): Likewise. * ia64-gen.c (_opcode_int64_low, _opcode_int64_high): Delete. (opcode_fprintf_vma): Delete. (print_main_table): Use PRIx64 to print opcode. binutils/ * od-macho.c: Replace all uses of printf_vma with bfd_printf_vma. * objcopy.c (copy_object): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. (copy_main): Likewise. * readelf.c (CHECK_ENTSIZE_VALUES): Likewise. (dynamic_section_mips_val): Likewise. (print_vma): Don't use printf_vma. Instead use PRIx64 to print bfd_vma values. (dump_ia64_vms_dynamic_fixups): Likewise. (process_version_sections): Likewise. * rddbg.c (stab_context): Likewise. gas/ * config/tc-i386.c (offset_in_range): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. (md_assemble): Likewise. * config/tc-mips.c (load_register, macro): Likewise. * messages.c (as_internal_value_out_of_range): Likewise. * read.c (emit_expr_with_reloc): Likewise. * config/tc-ia64.c (note_register_values): Don't use fprintf_vma. Instead use PRIx64 to print bfd_vma values. (print_dependency): Likewise. * listing.c (list_symbol_table): Use bfd_sprintf_vma. * symbols.c (print_symbol_value_1): Use %p to print pointers. (print_binary): Likewise. (print_expr_1): Use PRIx64 to print bfd_vma values. * write.c (print_fixup): Use %p to print pointers. Don't use fprintf_vma. * testsuite/gas/all/overflow.l: Update expected output. * testsuite/gas/m68k/mcf-mov3q.d: Likewise. * testsuite/gas/m68k/operands.d: Likewise. * testsuite/gas/s12z/truncated.d: Likewise. ld/ * deffilep.y (def_file_print): Don't use fprintf_vma. Instead use PRIx64 to print bfd_vma values. * emultempl/armelf.em (gld${EMULATION_NAME}_finish): Don't use sprintf_vma. Instead use PRIx64 to print bfd_vma values. * emultempl/pe.em (gld${EMULATION_NAME}_finish): Likewise. * ldlang.c (lang_map): Use %V to print region origin. (lang_one_common): Don't use sprintf_vma. * ldmisc.c (vfinfo): Don't use fprintf_vma or sprintf_vma. * pe-dll.c (pe_dll_generate_def_file): Likewise. gdb/ * remote.c (remote_target::trace_set_readonly_regions): Replace uses of sprintf_vma with bfd_sprintf_vma.
2022-07-29libopcodes/aarch64: add support for disassembler stylingAndrew Burgess
This commit enables disassembler styling for AArch64. After this commit it is possible to have objdump style AArch64 disassembler output (using --disassembler-color option). Once the required GDB patches are merged, GDB will also style the disassembler output. The changes to support styling are mostly split between two files opcodes/aarch64-dis.c and opcodes/aarch64-opc.c. The entry point for the AArch64 disassembler can be found in aarch64-dis.c, this file handles printing the instruction mnemonics, and assembler directives (e.g. '.byte', '.word', etc). Some operands, mostly relating to assembler directives are also printed from this file. This commit changes all of this to pass through suitable styling information. However, for most "normal" instructions, the instruction operands are printed using a two step process. From aarch64-dis.c, in the print_operands function, the function aarch64_print_operand is called, this function is in aarch64-opc.c, and converts an instruction operand into a string. Then, back in print_operands (aarch64-dis.c), the operand string is printed. Unfortunately, the string returned by aarch64_print_operand can be quite complex, it will include syntax elements, like '[' and ']', in addition to register names and immediate values. In some cases, a single operand will expand into what will appear (to the user) as multiple operands separated with a ','. This makes the task of styling more complex, all these different components need to by styled differently, so we need to get the styling information out of aarch64_print_operand in some way. The solution that I propose here is similar to the solution that I used for the i386 disassembler. Currently, aarch64_print_operand uses snprintf to write the operand text into a buffer provided by the caller. What I propose is that we pass an extra argument to the aarch64_print_operand function, this argument will be a structure, the structure contains a callback function and some state. When aarch64_print_operand needs to format part of its output this can be done by using the callback function within the new structure, this callback returns a string with special embedded markers that indicate which mode should be used for each piece of text. Back in aarch64-dis.c we can spot these special style markers and use this to split the disassembler output up and apply the correct style to each piece. To make aarch64-opc.c clearer a series of new static functions have been added, e.g. 'style_reg', 'style_imm', etc. Each of these functions formats a piece of text in a different style, 'register' and 'immediate' in this case. Here's an example taken from aarch64-opc.c of the new functions in use: snprintf (buf, size, "[%s, %s]!", style_reg (styler, base), style_imm (styler, "#%d", opnd->addr.offset.imm)); The aarch64_print_operand function is also called from the assembler to aid in printing diagnostic messages. Right now I have no plans to add styling to the assembler output, and so, the callback function used in the assembler ignores the styling information and just returns an plain string. I've used the source files in gas/testsuite/gas/aarch64/ for testing, and have manually gone through and checked that the styling looks reasonable, however, I'm not an AArch64 expert, so it is possible that the odd piece is styled incorrectly. Please point out any mistakes I've made. With objdump disassembler color turned off, there should be no change in the output after this commit.
2022-07-29Arm64: re-work PR gas/27217 fixJan Beulich
The original approach has resulted in anomalies when . is involved in an operand of one of the affected insns. We cannot leave . unresolved, or else it'll be resolved at the end of assembly, then pointing to the address of a section rather than at the insn of interest. Undo part of the original change and instead check whether a relocation cannot be omitted in md_apply_fix(). By resolving the expressions again, equates (see the adjustment of the respective testcase) will now be evaluated, and hence relocations against absolute addresses be emitted. This ought to be okay as long as the equates aren't global (and hence can't be overridden). If a need for such arises, quite likely the only way to address this would be to invent yet another expression evaluation mode, leaving everything _except_ . un-evaluated. There's a further anomaly in how transitive equates are handled. In .set x, 0x12345678 .eqv bar, x foo: adrp x0, x add x0, x0, :lo12:x adrp x0, bar add x0, x0, :lo12:bar the first two relocations are now against *ABS*:0x12345678 (as said above), whereas the latter two relocations would be against x. (Before the change here, the first two relocations are against x and the latter two against bar.) But this is an issue seen elsewhere as well, and would likely require adjustments in the target-independent parts of the assembler instead of trying to hack around this for every target.
2022-07-29RISC-V: Add `OP_V' to .insn named opcodesTsukasa OI
This commit adds `OP_V' (OP-V: vector instruction opcode for now ratified `V' extension) to .insn opcode name list. Although vector instruction encoding is not implemented in `.insn' directive, it will help future implementation of custom vector `.insn'. gas/ChangeLog: * config/tc-riscv.c (opcode_name_list): Add `OP_V'. * testsuite/gas/riscv/insn.s: Add testcase. * testsuite/gas/riscv/insn.d: Likewise. * testsuite/gas/riscv/insn-dwarf.d: Reflect insn.s update.
2022-07-26Updated translations for various sub-directoriesNick Clifton
2022-07-25LoongArch: Add testcases for new relocate types.liuzhensong
gas/testsuite/gas/all/ gas.exp gas/testsuite/gas/loongarch/ jmp_op.d jmp_op.s macro_op.d macro_op.s macro_op_32.d macro_op_32.s macro_op_large_abs.d macro_op_large_abs.s macro_op_large_pc.d macro_op_large_pc.s reloc.d reloc.s ld/testsuite/ld-elf/ pr26936.d shared.exp ld/testsuite/ld-loongarch-elf/ attr-ifunc-4.c attr-ifunc-4.out disas-jirl.d ifunc.exp jmp_op.d jmp_op.s libnopic-global.s macro_op.d macro_op.s macro_op_32.d macro_op_32.s nopic-global-so.rd nopic-global-so.sd nopic-global.out nopic-global.s nopic-global.sd nopic-global.xd nopic-local.out nopic-local.rd nopic-local.s nopic-local.sd nopic-local.xd nopic-weak-global-so.rd nopic-weak-global-so.sd nopic-weak-global.out nopic-weak-global.s nopic-weak-global.sd nopic-weak-global.xd nopic-weak-local.out nopic-weak-local.rd nopic-weak-local.s nopic-weak-local.sd nopic-weak-local.xd pic.exp pic.ld
2022-07-25LoongArch: gas: Add new reloc types.liuzhensong
Generate new relocate types while use new macro insns. gas/config/ loongarch-lex.h loongarch-parse.y tc-loongarch.c tc-loongarch.h
2022-07-21x86/Intel: correct AVX512F scatter insn element sizesJan Beulich
I clearly screwed up in 6ff00b5e12e7 ("x86/Intel: correct permitted operand sizes for AVX512 scatter/gather") giving all AVX512F scatter insns Dword element size. Update testcases (also their gather parts), utilizing that there previously were two identical lines each (for no apparent reason).
2022-07-21PR29390, DW_CFA_AARCH64_negate_ra_state vs. DW_CFA_GNU_window_saveAlan Modra
PR 29390 binutils/ * dwarf.c (is_aarch64, DW_CFA_GNU_window_save_name): New. (display_debug_frames): Use them. (init_dwarf_regnames_aarch64): Set is_aarch64. (init_dwarf_regnames_by_elf_machine_code): Clear is_aarch64. (init_dwarf_regnames_by_bfd_arch_and_mach): Likewise. gas/ * testsuite/gas/aarch64/pac_ab_key.d: Adjust expected output. * testsuite/gas/aarch64/pac_negate_ra_state.d: Likewise.
2022-07-20gas/symbols: introduce md_resolve_symbolDmitry Selyutin
Assuming GMSD is a special operand, marked as O_md1, the code: .set VREG, GMSD .set REG, VREG extsw REG, 2 ...fails upon attempts to resolve the value of the symbol. This happens since machine-dependent values are not handled in the giant op switch. We introduce a custom md_resolve_symbol macro; the ports can use this macro to customize the behavior when resolve_symbol_value hits O_md operand.
2022-07-18arc: Update missing cipher.Claudiu Zissulescu
The ciphers 5,7, and 9 are missing when parsing an assembly instruction leading to errors when those ciphers are used. gas/config * tc-arc.c (md_assembly): Update strspn string with the missing ciphers. Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2022-07-18x86: correct VMOVSH attributesJan Beulich
Both forms were missing VexW0 (thus allowing Evex.W=1 to be encoded by suitable means, which would cause #UD). The memory operand form further was using the wrong Masking value, thus allowing zeroing-masking to be encoded for the store form (which would again cause #UD).
2022-07-14Re: PowerPC: implement md_operand to parse register namesAlan Modra
I meant to make this change before committing, to let compilers know the code on the false branch of md_parse_name is dead. * config/tc-ppc.c (ppc_parse_name): Return void. * config/tc-ppc.h (md_parse_name): Always true. (ppc_parse_name): Update prototype.
2022-07-14PowerPC: implement md_operand to parse register namesAlan Modra
Allows register names to appear in symbol assignments, so for example tocp = %r2 mr %r3,tocp now assembles. * gas/config/tc-ppc.c (REG_NAME_CNT): Delete, replace uses with ARRAY_SIZE. (register_name): Rename to.. (md_operand): ..this. Only handle %reg. (cr_names): Rename to.. (cr_cond): ..this. Just keep conditions. (ppc_parse_name): Add mode param. Search both cr_cond and pre_defined_registers. Handle absolute and register symbol values here rather than in expr.c:operand(). (md_assemble): Don't special case register name matching in operands, except to set cr_operand as appropriate. * gas/config/tc-ppc.h (md_operand): Don't define. (md_parse_name, ppc_parse_name): Update. * read.c (pseudo_set): Copy over entire O_register value. * testsuite/gas/ppc/regsyms.d. * testsuite/gas/ppc/regsyms.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2022-07-12PowerPC md_end: Don't htab_delete(NULL)Alan Modra
It might be possible to hit md_end before md_begin is called, don't segfault if so. Also, remove a useless check. * gas/config/tc-ppc.c (insn_calloc): Remove needless overflow check. (ppc_md_end): Check ppc_hash before deleting. Clear ppc_hash.
2022-07-09gas: tc-tic54x.c hash tablesAlan Modra
Cleaning up the subsym_hash memory is a real pain. Keys and values entered into the table are quite diverse. In some cases the key is allocated and thus needs to be freed, in others the key is a const string. Values are similar, and in some cases not even a string. Tidy this by inserting a new subsym_ent_t that describes key/value type. This meant the math_hash table was no longer needed. The patch also tidies how math functions are called, those that are supposed to return int now no longer return their value in a float. * config/tc-tic54x.c (math_hash): Delete. (subsym_proc_entry): Move earlier, make proc a union, merge with.. (math_proc_entry): ..this. Delete type. (math_procs): Merge into subsym_procs. (subsym_ent_t): New. Use this type in subsym_hash.. (stag_add_field_symbols, tic54x_var, tic54x_macro_info): ..here.. (md_begin, subsym_create_or_replace, subsym_lookup): ..and here.. (subsym_substitute): ..and here. Adjust subsym_proc_entry function calls. Free replacement when not returned. (subsym_get_arg): Adjust subsym_lookup. (free_subsym_ent, subsym_htab_create ): New functions, use when creating subsym_hash. (free_local_label_ent, local_label_htab_create): Similarly. (tic54x_remove_local_label): Delete. (tic54x_clear_local_labels): Simplify. (tic54x_asg): Use notes obstack to dup strings. (tic54x_eval): Likewise. (subsym_ismember): Likewise. (math_cvi, math_int, math_sgn): Return int. (tic54x_macro_start): Decrement macro_level before calling as_fatal. (tic54x_md_end): New function. * config/tc-tic54h.c (tic54x_md_end): Declare. (md_end): Define.
2022-07-09gas: use notes_calloc in string hashAlan Modra
Using notes_calloc means all of the string hash table memory should now be freed before gas exits, even though htab_delete isn't called. This also means that the hash table free_f and del_f must be NULL, because freeing notes obstack memory results in all more recently allocated notes memory being freed too. So hash table resizing won't free any memory, and will be a little faster. Also, htab_delete won't do anything (and be quick about it). Since htab_traverse can also resize hash tables (to make another traversal faster if the table is largely empty), stop that happening when only one traversal is done. * as.h: Reorder hash.h after symbols.h for notes_calloc decl. * hash.h (str_htab_create): Use notes_calloc. Do not free. * symbols.c (resolve_local_symbol_values): Don't resize during hash table traversal. * config/obj-elf.c (elf_frob_file_after_relocs): Likewise. * config/tc-ia64.c (ia64_adjust_symtab, ia64_frob_file): Likewise. * config/tc-nds32.c (nds32_elf_analysis_relax_hint): Likewise.
2022-07-09gas: target string hash tablesAlan Modra
This allocates entries added to the string hash tables on the notes obstack, so that at least those do not leak. A followup patch will switch over the str_hash allocation to notes_calloc, which is why I haven't implemented deleting all the target string hash tables. * config/obj-coff-seh.c (get_pxdata_name, alloc_pxdata_item): Use notes obstack for string hash table entries. * config/tc-alpha.c (get_alpha_reloc_tag, md_begin): Likewise. * config/tc-h8300.c (md_begin): Likewise. * config/tc-ia64.c (dot_rot, dot_pred_rel, dot_alias): Likewise. * config/tc-nds32.c (nds32_relax_hint): Likewise. * config/tc-riscv.c (riscv_init_csr_hash): Likewise. * config/tc-score.c (s3_insert_reg): Likewise. (s3_build_score_ops_hsh, s3_build_dependency_insn_hsh): Likewise. * config/tc-score7.c (s7_build_score_ops_hsh): Likewise. (s7_build_dependency_insn_hsh): Likewise. * config/tc-tic4x.c (tic4x_asg): Likewise.
2022-07-09arc gas: don't leak arc_opcode_hash memoryAlan Modra
The arc opcode hash table has entries that have a realloc'd field. This doesn't lend itself to obstack allocation, so freeing must be done with a purpose built hashtab del_f. * config/tc-arc.c (arc_opcode_free): New function. (md_begin): Pass the above as del_f to htab_create_alloc. (arc_md_end): New function. * config/tc-arc.h (arc_md_end): Declare. (md_end): Define.
2022-07-09i386 gas: don't leak op_hash or reg_hash memoryAlan Modra
This tidies memory used by the two x86 gas string hash tables before exiting. I'm using a two-pronged approach, firstly the obvious call to htab_delete plus telling the libiberty/hashtab.c infrastructure to free tuples generated by str_hash_insert, and secondly putting the x86 core_optab memory on the notes obstack. It would be possible to free core_optab memory by using a custom hash table del_f on x86, as I do for arc, but a later patch will move all the string hash memory to the notes obstack. * config/tc-i386.c (md_begin): Use notes_alloc for core_optab. (386_md_end): New function. * config/tc-i386.h (386_md_end): Declare. (md_end): Define. * hash.h (str_htab_create): Pass free as del_f.
2022-07-09ppc gas: don't leak ppc_hash memoryAlan Modra
* config/tc-ppc.c (insn_obstack): New. (insn_calloc): New function. (ppc_setup_opcodes): Use insn_obstack for ppc_hash. (ppc_md_end): New function. * config/tc-ppc.h (ppc_md_end): Declare (md_end): Define.
2022-07-09gas hash.h tidyAlan Modra
Only inline functions should be defined in hash.h, there's no benefit in having multiple copies of hash_string_tuple and eq_string_tuple. Also, use the table alloc_f when allocating tuples to be stored, so that these functions are usable with different memory allocation strategies. * hash.h (struct string_tuple, string_tuple_t): Move earlier. (string_tuple_alloc): Add table param, allocate using table alloc_f. (str_hash_insert): Adjust to suit. Call table->free_f when entry is not used. (hash_string_tuple, eq_string_tuple): Move to.. * hash.c: ..here.
2022-07-09gas: rename md_end to md_finishAlan Modra
Currently md_end is typically used for some final actions rather than freeing memory like other *_end functions. Rename it to md_finish, and rename target implementation. The renaming of target functions makes it possible to find them all with "grep md_finish", eg. md_mips_end is renamed to mips_md_finish, not md_mips_finish. This patch leaves a number of md_end functions unchanged, those that either do nothing or deallocate memory, and calls them late. The idea here is that target maintainers implement md_end functions to tidy memory, if anyone cares. Freeing persistent memory in gas is not at all important, except that it can hide more important memory leaks, those that happen once per some frequent gas operation, amongst these unimportant memory leaks. * as.c (main): Rename md_end to md_finish. * config/tc-alpha.c, * config/tc-alpha.h, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-csky.c, * config/tc-csky.h, * config/tc-ia64.c, * config/tc-ia64.h, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mmix.h, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-ppc.c, * config/tc-ppc.h, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-s390.c, * config/tc-s390.h, * config/tc-sparc.c, * config/tc-sparc.h, * config/tc-tic4x.c, * config/tc-tic4x.h, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-v850.c, * config/tc-v850.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z80.h: Similarly. * output-file.c (output_file_close): Call md_end.
2022-07-09gas: set up notes obstack earlierAlan Modra
So that the notes obstack can be used for persistent storage in parse_args. * as.c (parse_args): Use notes_alloc and notes_strdup. (free_notes): New function. (main): Init notes obstack, and arrange to be freed on exit. * read.c (read_begin): Don't init notes obstack. (read_end): Free cond_obstack. * subsegs.c (subsegs_end): Don't free cond_obstack or notes.
2022-07-09gas: itbl_filesAlan Modra
itbl_files seems to be debug code. Get rid of it. * as.c (struct itbl_file_list): Delete. (itbl_files): Delete. (parse_args): Don't keep itbl_files list.
2022-07-09gas: free sy_hash, macro_hash and po_hashAlan Modra
* macro.c (macro_end): New function. * macro.h (macro_end): Declare. * read.c (read_end, poend): New functions. * read.h (read_end): Declare. * symbols.c (symbol_end): New function. * symbols.h (symbol_end): Declare. * output-file.c (output_file_close): Call new *_end functions.
2022-07-09dw2gencfi.c: use notes obstackAlan Modra
Use notes obstack for dwcfi_hash entries, and free table. Freeing the table makes memory checkers complain more about "definitely lost" memory as we've moved some from the "still reachable" category. That will be fixed with a later patch. * dw2gencfi.c (get_debugseg_name): Allocate on notes obstack. (alloc_debugseg_item): Likewise. (dwcfi_hash_find_or_make): Adjust failure path free. (cfi_finish): Delete dwfci_hash.
2022-07-09expr.c make_expr_symbol: use notes obstackAlan Modra
* expr.c (make_expr_symbol): Use notes_alloc.
2022-07-09read.c assign_symbol: use notes obstack for dummy listing fragAlan Modra
* read.c (assign_symbol): Use notes_calloc for dummy_frag.
2022-07-09read.c s_include: use notes obstack for pathAlan Modra
* read.c (s_include): Use notes obstack for path mem.
2022-07-09macro.c: use string hash from hash.h for macro_hashAlan Modra
Another case of duplicated hash.h code, the only minor difference being that macro->format_hash was created with 7 entries vs. str_hash with 16 entries. * macro.c (macro_init, define_macro): Use str_htab_create. (do_formals, define_macro, macro_expand_body): Use str_hash_insert (macro_expand_body): Use str_hash_find and str_hash_delete. (delete_macro): Likewise. (sub_actual, macro_expand, check_macro): Use str_hash_find. (expand_irp): Use str_htab_create and str_hash_insert. * macro.h (struct macro_struct): Tidy. (struct macro_hash_entry, macro_hash_entry_t, hash_macro_entry), (eq_macro_entry, macro_entry_alloc, macro_entry_find), (struct formal_hash_entry, formal_hash_entry_t), (hash_formal_entry, eq_formal_entry, formal_entry_alloc), (formal_entry_find): Delete. * config/tc-iq2000.c (iq2000_add_macro): Use str_htab_create and str_hash_insert.
2022-07-09read.c: use string hash from hash.h for po_hashAlan Modra
po_hash code duplicates the str_hash code in hash.h for no good reason. * read.c (struct po_entry, po_entry_t): Delete. (hash_po_entry, eq_po_entry, po_entry_alloc, po_entry_find): Delete. (pop_insert): Use str_hash_insert. (pobegin): Use str_htab_create. (read_a_source_file, s_macro): Use str_hash_find.
2022-07-09free read_symbol_name stringAlan Modra
read_symbol_name mallocs the string it returns. Free it when done. * read.c (read_symbol_name): Free name on error path. * config/tc-ppc.c (ppc_GNU_visibility): Free name returned from read_symbol_name. (ppc_extern, ppc_globl, ppc_weak): Likewise.
2022-07-09gas: output_file_closeAlan Modra
This is mostly a tidy with the aim of being able to free out_file_name, but it does fix a possible attempt to unlink the output file twice (not that that matters). * as.h (keep_it): New global. * as.c (keep_it): Delete. (close_output_file): Delete, merged into.. * output-file.c (output_file_close): ..here. Delete parameter. * output-file.h (output_file_close): Update prototype.
2022-07-09gas: utility notes memory alloc functionsAlan Modra
Makes it a little easier to use the notes obstack for persistent storage. * as.h (gas_mul_overflow): Define. * symbols.h (notes_alloc, notes_calloc, notes_memdup), (notes_strdup, notes_concat, notes_free): Declare. * symbols.c (notes_alloc, notes_calloc, notes_memdup), (notes_strdup, notes_concat, notes_free): New functions. (save_symbol_name): Use notes_strdup. (symbol_create, local_symbol_make, local_symbol_convert), (symbol_clone, decode_local_label_name): Use notes_alloc.
2022-07-09gas: arm -mwarn-syms duplicatesAlan Modra
arm gas is only supposed to warn once per symbol for -mwarn-syms, but doesn't because the str_hash_find added with commit 629310abec88 always returns NULL. That's so because the str_hash_insert inserts a NULL value for the key,value pair. Let str_hash_insert do the job instead. * config/tc-arm.c (arm_tc_equal_in_insn): Correct already_warned logic. * testsuite/gas/arm/pr18347.s: Modify to generate duplicate warning without this patch.
2022-07-09Regenerate with automake-1.15.1Alan Modra
Until we update the recommended versions of autoconf/automake, files should be regenerated with automake-1.15.1 and autoconf-2.69. That's not because we think those versions are golden, and newer versions are bad. It's simply because maintainers want to be able to update configury files without trouble, and if someone regenerates files with automake-1.16.5 then --enable-maintainer-mode builds will hit errors: checking that generated files are newer than configure... configure.ac:26: error: version mismatch. This is Automake 1.15.1, configure.ac:26: but the definition used by this AM_INIT_AUTOMAKE configure.ac:26: comes from Automake 1.16.5. You should recreate configure.ac:26: aclocal.m4 with aclocal and run automake again. WARNING: 'automake-1.15' is probably too old. Correcting this requires regenerating the files by hand.
2022-07-08Update version to 2.39.50 and regenerate filesNick Clifton
2022-07-08Add markers for 2.39 branchNick Clifton
2022-07-07RISC-V: Added Zfhmin and Zhinxmin.Tsukasa OI
This commit adds Zfhmin and Zhinxmin extensions (subsets of Zfh and Zhinx extensions, respectively). In the process supporting Zfhmin and Zhinxmin extension, this commit also changes how instructions are categorized considering Zfhmin, Zhinx and Zhinxmin extensions. Detailed changes, * From INSN_CLASS_ZFH to INSN_CLASS_ZFHMIN: flh, fsh, fmv.x.h and fmv.h.x. * From INSN_CLASS_ZFH to INSN_CLASS_ZFH_OR_ZHINX: fmv.h. * From INSN_CLASS_ZFH_OR_ZHINX to INSN_CLASS_ZFH_OR_ZHINX: fneg.h, fabs.h, fsgnj.h, fsgnjn.h, fsgnjx.h, fadd.h, fsub.h, fmul.h, fdiv.h, fsqrt.h, fmin.h, fmax.h, fmadd.h, fnmadd.h, fmsub.h, fnmsub.h, fcvt.w.h, fcvt.wu.h, fcvt.h.w, fcvt.h.wu, fcvt.l.h, fcvt.lu.h, fcvt.h.l, fcvt.h.lu, feq.h, flt.h, fle.h, fgt.h, fge.h, fclass.h. * From INSN_CLASS_ZFH_OR_ZHINX to INSN_CLASS_ZFHMIN_OR_ZHINXMIN: fcvt.s.h and fcvt.h.s. * From INSN_CLASS_D_AND_ZFH_INX to INSN_CLASS_ZFHMIN_AND_D: fcvt.d.h and fcvt.h.d. * From INSN_CLASS_Q_AND_ZFH_INX to INSN_CLASS_ZFHMIN_AND_Q: fcvt.q.h and fcvt.h.q. bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Change implicit subsets. Zfh->Zicsr is not needed and Zfh->F is replaced with Zfh->Zfhmin and Zfhmin->F. Zhinx->Zicsr is not needed and Zhinx->Zfinx is replaced with Zhinx->Zhinxmin and Zhinxmin->Zfinx. (riscv_supported_std_z_ext): Added zfhmin and zhinxmin. (riscv_multi_subset_supports): Rewrite handling for new instruction classes. (riscv_multi_subset_supports_ext): Updated. (riscv_parse_check_conflicts): Change error message to include zfh and zfhmin extensions. gas/ChangeLog: * testsuite/gas/riscv/zfhmin-d-insn-class-fail.s: New complex error handling test. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d: Likewise. * testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l: Likewise. * testsuite/gas/riscv/zhinx.d: Renamed from fp-zhinx-insns.d and refactored. * testsuite/gas/riscv/zhinx.s: Likewise. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class): Removed INSN_CLASS_ZFH, INSN_CLASS_D_AND_ZFH_INX and INSN_CLASS_Q_AND_ZFH_INX. Added INSN_CLASS_ZFHMIN, INSN_CLASS_ZFHMIN_OR_ZHINXMIN, INSN_CLASS_ZFHMIN_AND_D and INSN_CLASS_ZFHMIN_AND_Q. opcodes/ChangeLog: * riscv-opc.c (riscv_opcodes): Change instruction classes for Zfh and Zfhmin instructions. Fix `fcvt.h.lu' instruction (two operand variant) mask.