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| author | Alex Coplan <alex.coplan@arm.com> | 2020-04-30 15:47:30 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2020-04-30 15:47:30 +0100 |
| commit | 09c1e68a162f9a2c2cadee916387a147a8af44b7 (patch) | |
| tree | a0c677f1aa242b8e99f55a6c9856e24043e8de23 /opcodes/aarch64-opc.c | |
| parent | 8a8a1171237d45e20b2ebb18ee2d3f8686e01b82 (diff) | |
AArch64: add GAS support for UDF instruction
binutils * testsuite/binutils-all/aarch64/in-order-all.d: Update to use new
disassembly.
* testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise.
ld/ * testsuite/ld-aarch64/erratum843419_tls_ie.d: Use udf in disassembly.
* testsuite/ld-aarch64/farcall-b-section.d: Likewise.
* testsuite/ld-aarch64/farcall-back.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
gas/ * config/tc-aarch64.c (fix_insn): Implement for AARCH64_OPND_UNDEFINED.
(parse_operands): Implement for AARCH64_OPND_UNDEFINED.
* testsuite/gas/aarch64/udf.s: New.
* testsuite/gas/aarch64/udf.d: New.
* testsuite/gas/aarch64/udf-invalid.s: New.
* testsuite/gas/aarch64/udf-invalid.l: New.
* testsuite/gas/aarch64/udf-invalid.d: New.
include * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_UNDEFINED.
opcodes * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
* aarch64-opc.c (fields): Add entry for FLD_imm16_2.
(operand_general_constraint_met_p): validate AARCH64_OPND_UNDEFINED.
* aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry for
FLD_imm16_2.
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
Diffstat (limited to 'opcodes/aarch64-opc.c')
| -rw-r--r-- | opcodes/aarch64-opc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 54701ffa1b..faa0503dcf 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -251,6 +251,7 @@ const aarch64_field fields[] = { 10, 12 }, /* imm12: in ld/st unsigned imm or add/sub shifted inst. */ { 5, 14 }, /* imm14: in test bit and branch instructions. */ { 5, 16 }, /* imm16: in exception instructions. */ + { 0, 16 }, /* imm16_2: in udf instruction. */ { 0, 26 }, /* imm26: in unconditional branch instructions. */ { 10, 6 }, /* imms: in bitfield and logical immediate instructions. */ { 16, 6 }, /* immr: in bitfield and logical immediate instructions. */ @@ -2145,6 +2146,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, case AARCH64_OPND_NZCV: case AARCH64_OPND_CCMP_IMM: case AARCH64_OPND_EXCEPTION: + case AARCH64_OPND_UNDEFINED: case AARCH64_OPND_TME_UIMM16: case AARCH64_OPND_UIMM4: case AARCH64_OPND_UIMM4_ADDG: @@ -3357,6 +3359,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, case AARCH64_OPND_IMM0: case AARCH64_OPND_IMMR: case AARCH64_OPND_IMMS: + case AARCH64_OPND_UNDEFINED: case AARCH64_OPND_FBITS: case AARCH64_OPND_TME_UIMM16: case AARCH64_OPND_SIMM5: |