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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:21 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:21 +0100 |
| commit | cd50a87ae29f163e7d254729a902a5e51fcccbbc (patch) | |
| tree | 846a94ad055f754de290541aae7b6421ce85f1bb /opcodes/aarch64-dis.c | |
| parent | 3c705960ca0e12bb5d3a12d14ca6703006102d98 (diff) | |
[binutils][aarch64] New sve_size_013 iclass.
Add sve_size_013 instruction class
This new iclass handles instructions such as pmullb whose size specifier
can only be encoded as 0, 1, or 3.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_size_013 iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_size_013 iclass decode.
Diffstat (limited to 'opcodes/aarch64-dis.c')
| -rw-r--r-- | opcodes/aarch64-dis.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index bfc47b4c1b..1a727a4ba8 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2822,6 +2822,16 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst) variant = i - 1; break; + case sve_size_013: + i = extract_field (FLD_size, inst->value, 0); + if (i == 2) + return FALSE; + if (i == 3) + variant = 2; + else + variant = i; + break; + default: /* No mapping between instruction class and qualifiers. */ return TRUE; |