diff options
| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-06-24 11:51:55 +0900 |
|---|---|---|
| committer | Nelson Chu <nelson.chu@sifive.com> | 2022-06-28 09:08:06 +0800 |
| commit | 713f370809b523277f8ecc69680ab591ce94da5e (patch) | |
| tree | e2793913827eeee23319a9683ea1ead5f1a553cb /bfd/elfxx-riscv.c | |
| parent | 6af47b081ec0e93ad1d79c47a7f093db88f7653d (diff) | |
RISC-V: Add 'Sscofpmf' extension with its CSRs
This commit adds Count Overflow and Mode-Based Filtering Extension
(Sscofpmf) and its CSRs.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Sscofpmf'
extension to valid 'S' extension list.
gas/ChangeLog:
* config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for
'Sscofpmf' extension. (riscv_csr_address): Add handling for new
CSR classes.
* testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs.
* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
* testsuite/gas/riscv/csr.s: Add new CSRs.
* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
include/ChangeLog:
* opcode/riscv-opc.h (CSR_SCOUNTOVF, CSR_MHPMEVENT3H,
CSR_MHPMEVENT4H, CSR_MHPMEVENT5H, CSR_MHPMEVENT6H,
CSR_MHPMEVENT7H, CSR_MHPMEVENT8H, CSR_MHPMEVENT9H,
CSR_MHPMEVENT10H, CSR_MHPMEVENT11H, CSR_MHPMEVENT12H,
CSR_MHPMEVENT13H, CSR_MHPMEVENT14H, CSR_MHPMEVENT15H,
CSR_MHPMEVENT16H, CSR_MHPMEVENT17H, CSR_MHPMEVENT18H,
CSR_MHPMEVENT19H, CSR_MHPMEVENT20H, CSR_MHPMEVENT21H,
CSR_MHPMEVENT22H, CSR_MHPMEVENT23H, CSR_MHPMEVENT24H,
CSR_MHPMEVENT25H, CSR_MHPMEVENT26H, CSR_MHPMEVENT27H,
CSR_MHPMEVENT28H, CSR_MHPMEVENT29H, CSR_MHPMEVENT30H,
CSR_MHPMEVENT31H): New CSR macros.
Diffstat (limited to 'bfd/elfxx-riscv.c')
| -rw-r--r-- | bfd/elfxx-riscv.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index f72b827651..855501c8ee 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1232,6 +1232,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = static struct riscv_supported_ext riscv_supported_std_s_ext[] = { {"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"svinval", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {NULL, 0, 0, 0, 0} }; |